From owner-svn-src-projects@FreeBSD.ORG Fri Oct 30 00:37:51 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 11D581065692; Fri, 30 Oct 2009 00:37:51 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 0000B8FC27; Fri, 30 Oct 2009 00:37:50 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n9U0bow8018297; Fri, 30 Oct 2009 00:37:50 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n9U0bo43018295; Fri, 30 Oct 2009 00:37:50 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <200910300037.n9U0bo43018295@svn.freebsd.org> From: Warner Losh Date: Fri, 30 Oct 2009 00:37:50 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r198666 - projects/mips/sys/mips/include X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Oct 2009 00:37:51 -0000 Author: imp Date: Fri Oct 30 00:37:50 2009 New Revision: 198666 URL: http://svn.freebsd.org/changeset/base/198666 Log: Add some newer MIPS CO cores. Modified: projects/mips/sys/mips/include/cpuregs.h Modified: projects/mips/sys/mips/include/cpuregs.h ============================================================================== --- projects/mips/sys/mips/include/cpuregs.h Fri Oct 30 00:37:04 2009 (r198665) +++ projects/mips/sys/mips/include/cpuregs.h Fri Oct 30 00:37:50 2009 (r198666) @@ -850,6 +850,10 @@ #define MIPS_4KEc_R2 0x90 /* MIPS 4KEc_R2 ISA 32 Rel 2 */ #define MIPS_4KEmp_R2 0x91 /* MIPS 4KEm/4KEp_R2 ISA 32 Rel 2 */ #define MIPS_4KSd 0x92 /* MIPS 4KSd ISA 32 Rel 2 */ +#define MIPS_24K 0x93 /* MIPS 24Kc/24Kf ISA 32 Rel 2 */ +#define MIPS_34K 0x95 /* MIPS 34K ISA 32 R2 MT */ +#define MIPS_24KE 0x96 /* MIPS 24KEc ISA 32 Rel 2 */ +#define MIPS_74K 0x97 /* MIPS 74Kc/74Kf ISA 32 Rel 2 */ /* * AMD (company ID 3) use the processor ID field to donote the CPU core