Date: Wed, 29 Oct 1997 04:53:53 GMT From: mouth@ibm.net (John Kelly) To: hackers@FreeBSD.ORG Subject: Re: Parity Ram Message-ID: <345abf0a.135742743@smtp-gw01.ny.us.ibm.net> In-Reply-To: <199710290229.DAA07708@ocean.campus.luth.se> References: <199710290229.DAA07708@ocean.campus.luth.se>
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On Wed, 29 Oct 1997 03:29:12 +0100 (CET), Mikael Karpberg <karpen@ocean.campus.luth.se> wrote: >> In order to update the memory, the ECC must be recalculated over the >> entire 64bit quadword. This escentially means that you have to read the >> memory first, apply the changes/calculate the new ECC and then write it >> back. Obviously,this makes memory writes quite a bit slower. > >Hmm... It's still not quite clear to me. That is, does this slow my >computer down, in case I use ECC? > >It seems to me all this could be done on the DIMM/SIMM I believe IBM, HP, and other servers which require x40 SIMMS perform ECC without any slowdown due to calculation overhead in the memory controller, as is true of the Intel approach to ECC with x36 SIMMS and the 430HX chipset and cousins. Of course those would be high end machines not affordable for many users. John
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