From owner-cvs-src-old@FreeBSD.ORG Wed Feb 17 06:43:55 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id CBD321065700 for ; Wed, 17 Feb 2010 06:43:55 +0000 (UTC) (envelope-from neel@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id B94108FC13 for ; Wed, 17 Feb 2010 06:43:55 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id o1H6htVH060227 for ; Wed, 17 Feb 2010 06:43:55 GMT (envelope-from neel@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id o1H6ht5l060226 for cvs-src-old@freebsd.org; Wed, 17 Feb 2010 06:43:55 GMT (envelope-from neel@repoman.freebsd.org) Message-Id: <201002170643.o1H6ht5l060226@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to neel@repoman.freebsd.org using -f From: Neel Natu Date: Wed, 17 Feb 2010 06:43:37 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/mips/mips bus_space_generic.c src/sys/mips/sibyte sb_asm.S sb_bus_space.h sb_zbpci.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Feb 2010 06:43:55 -0000 neel 2010-02-17 06:43:37 UTC FreeBSD src repository Modified files: sys/mips/mips bus_space_generic.c sys/mips/sibyte sb_asm.S sb_zbpci.c Added files: sys/mips/sibyte sb_bus_space.h Log: SVN rev 203985 on 2010-02-17 06:43:37Z by neel Various fixes to get the SWARM config working on a big-endian Sibyte CPU. Getting the little-endian PCI bus working on the big-endian CPU proved to be quite challenging. We let the PCI devices be mapped in the "match byte lanes" address window. This is where they are mapped by the CFE and DMA transfers generated to or from addresses within this window are not subject to automatic byte-swapping. However any access by the driver to memory-mapped pci space is redirected via the "match bit lanes" address window. We get the benefit of automatic byte swapping through this address window and drivers don't need to change to deal with CPU big-endianness. Revision Changes Path 1.3 +8 -0 src/sys/mips/mips/bus_space_generic.c 1.4 +3 -2 src/sys/mips/sibyte/sb_asm.S 1.1 +43 -0 src/sys/mips/sibyte/sb_bus_space.h (new) 1.5 +151 -6 src/sys/mips/sibyte/sb_zbpci.c