From owner-freebsd-hackers@FreeBSD.ORG Sat Jun 4 02:18:15 2005 Return-Path: X-Original-To: freebsd-hackers@freebsd.org Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 220E816A41C for ; Sat, 4 Jun 2005 02:18:15 +0000 (GMT) (envelope-from jmg@hydrogen.funkthat.com) Received: from mail25.sea5.speakeasy.net (mail25.sea5.speakeasy.net [69.17.117.27]) by mx1.FreeBSD.org (Postfix) with ESMTP id C300C43D1D for ; Sat, 4 Jun 2005 02:18:14 +0000 (GMT) (envelope-from jmg@hydrogen.funkthat.com) Received: (qmail 16944 invoked from network); 4 Jun 2005 02:18:14 -0000 Received: from gate.funkthat.com (HELO hydrogen.funkthat.com) ([69.17.45.168]) (envelope-sender ) by mail25.sea5.speakeasy.net (qmail-ldap-1.03) with SMTP for ; 4 Jun 2005 02:18:14 -0000 Received: from hydrogen.funkthat.com (nmbcnc@localhost.funkthat.com [127.0.0.1]) by hydrogen.funkthat.com (8.12.10/8.11.6) with ESMTP id j542IDEa075730; Fri, 3 Jun 2005 19:18:13 -0700 (PDT) (envelope-from jmg@hydrogen.funkthat.com) Received: (from jmg@localhost) by hydrogen.funkthat.com (8.12.10/8.12.10/Submit) id j542IDAm075727; Fri, 3 Jun 2005 19:18:13 -0700 (PDT) Date: Fri, 3 Jun 2005 19:18:13 -0700 From: John-Mark Gurney To: Matthew Dillon Message-ID: <20050604021812.GG594@funkthat.com> Mail-Followup-To: Matthew Dillon , freebsd-hackers@freebsd.org References: <200506032057.j53KvOFw062012@apollo.backplane.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200506032057.j53KvOFw062012@apollo.backplane.com> User-Agent: Mutt/1.4.1i X-Operating-System: FreeBSD 4.2-RELEASE i386 X-PGP-Fingerprint: B7 EC EF F8 AE ED A7 31 96 7A 22 B3 D8 56 36 F4 X-Files: The truth is out there X-URL: http://resnet.uoregon.edu/~gurney_j/ X-Resume: http://resnet.uoregon.edu/~gurney_j/resume.html Cc: freebsd-hackers@freebsd.org Subject: Re: Possible instruction pipelining problem between HT's on the same die ? X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: John-Mark Gurney List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 04 Jun 2005 02:18:15 -0000 Matthew Dillon wrote this message on Fri, Jun 03, 2005 at 13:57 -0700: > I've been tracking down a crash one of our users gets occassionally. > He has a quad Intel(R) XEON(TM) CPU 2.00GHz (1996.61-MHz 686-class CPU) > system. > > After getting a few of these crashes he pulled three of the four cpus > out. But with just one physical cpu, with HTT turned on (so two > logical cpus), he is still getting these crashes. > > This is the sequence that causes the bad data: > > cpu #0 write A > write B > > (HT)cpu #1 read B > if (B) > read A <---- gets OLD data in A, not new data [...] > I looked at the various SFENCE/LFENCE/MFENCE instructions and they > do not seem to guarentee ordering for speculative accesses at all. > They all say that they do not protect against speculative reads. > Bus-locked instructions don't seem to avoid speculative reads either. have you put a SFENCE between write A and write B? You never tell us where you've tried to put the various fence instructions... -- John-Mark Gurney Voice: +1 415 225 5579 "All that I will do, has been done, All that I have, has not."