Date: Fri, 7 May 2021 01:00:19 GMT From: Yuri Victorovich <yuri@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: 83069880812a - main - cad/irsim: Update 9.7.108 -> 9.7.110 PR: 254348 Approved by: danilo (maintainer's timeout 20 days) Message-ID: <202105070100.14710JqA074788@gitrepo.freebsd.org>
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The branch main has been updated by yuri: URL: https://cgit.FreeBSD.org/ports/commit/?id=83069880812a0f2a2fcfbb441837d20ea9306d53 commit 83069880812a0f2a2fcfbb441837d20ea9306d53 Author: Yuri Victorovich <yuri@FreeBSD.org> AuthorDate: 2021-05-07 00:58:45 +0000 Commit: Yuri Victorovich <yuri@FreeBSD.org> CommitDate: 2021-05-07 01:00:17 +0000 cad/irsim: Update 9.7.108 -> 9.7.110 PR: 254348 Approved by: danilo (maintainer's timeout 20 days) --- cad/irsim/Makefile | 5 ++++- cad/irsim/distinfo | 6 +++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/cad/irsim/Makefile b/cad/irsim/Makefile index ecd09ea7151a..e1fb12294bc1 100644 --- a/cad/irsim/Makefile +++ b/cad/irsim/Makefile @@ -1,7 +1,7 @@ # Created by: swallace PORTNAME= irsim -DISTVERSION= 9.7.108 +DISTVERSION= 9.7.110 CATEGORIES= cad MASTER_SITES= http://opencircuitdesign.com/irsim/archive/ @@ -50,4 +50,7 @@ post-patch: s|"-fpic"|"-fPIC"| ; \ /-l\/usr\/X11R6\/include/d' ${CONFIGURE_WRKSRC}/configure +post-install: + cd ${STAGEDIR}${PREFIX} && ${STRIP_CMD} bin/gentbl bin/genspktbl + .include <bsd.port.mk> diff --git a/cad/irsim/distinfo b/cad/irsim/distinfo index 1a33aeb89da1..9d31587c2c69 100644 --- a/cad/irsim/distinfo +++ b/cad/irsim/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1585096970 -SHA256 (irsim-9.7.108.tgz) = 0b4e67ff9febb10e1c9828b6b5fc672bd0a96ac914d2af04ec10776620a472dc -SIZE (irsim-9.7.108.tgz) = 466474 +TIMESTAMP = 1615922474 +SHA256 (irsim-9.7.110.tgz) = 8388d92081c0e47077f0b7f0a3de4e906da83260e0966c8da8016bb8c966aedc +SIZE (irsim-9.7.110.tgz) = 466632
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