From owner-freebsd-current@FreeBSD.ORG Wed Dec 7 18:07:40 2005 Return-Path: X-Original-To: current@freebsd.org Delivered-To: freebsd-current@FreeBSD.ORG Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 94F5516A41F for ; Wed, 7 Dec 2005 18:07:40 +0000 (GMT) (envelope-from scottl@samsco.org) Received: from pooker.samsco.org (pooker.samsco.org [168.103.85.57]) by mx1.FreeBSD.org (Postfix) with ESMTP id A7EC043D5E for ; Wed, 7 Dec 2005 18:07:35 +0000 (GMT) (envelope-from scottl@samsco.org) Received: from [192.168.254.14] (imini.samsco.home [192.168.254.14]) (authenticated bits=0) by pooker.samsco.org (8.13.4/8.13.4) with ESMTP id jB7I7S9W059718; Wed, 7 Dec 2005 11:07:28 -0700 (MST) (envelope-from scottl@samsco.org) Message-ID: <439724E0.3020102@samsco.org> Date: Wed, 07 Dec 2005 11:07:28 -0700 From: Scott Long User-Agent: Mozilla/5.0 (Macintosh; U; PPC Mac OS X Mach-O; en-US; rv:1.7.7) Gecko/20050416 X-Accept-Language: en-us, en MIME-Version: 1.0 To: "M. Warner Losh" References: <018e01c5fafe$c9154a20$642a15ac@smiley> <20051207.105722.60788677.imp@bsdimp.com> In-Reply-To: <20051207.105722.60788677.imp@bsdimp.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-1.4 required=3.8 tests=ALL_TRUSTED autolearn=failed version=3.1.0 X-Spam-Checker-Version: SpamAssassin 3.1.0 (2005-09-13) on pooker.samsco.org Cc: darren.pilgrim@bitfreak.org, current@freebsd.org Subject: Re: can someone explain...[ PCI interrupts] X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Dec 2005 18:07:40 -0000 M. Warner Losh wrote: > In message: <018e01c5fafe$c9154a20$642a15ac@smiley> > "Darren Pilgrim" writes: > : From: John Baldwin > : > > : > The reason [for masking interrupts] is that PCI interrupts are level > : > triggered, so they won't "shut up" until the ISR has run and pacified > : > the PCI device. > : > : But PCI interrupts can be programmed either level- or edge-triggered, so > : wouldn't programming to edge-triggered interrupts solve the "they won't shut > : up" issue? > > PCI interrupts are level. There's no way to program them otherwise. > > Warner While electrically they are level, the APIC can be programmed to pass them on either level or edge. Once you get into MSI, the distinction becomes very muddy. Scott