From owner-svn-src-head@FreeBSD.ORG Tue Aug 6 15:34:12 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 95D0970; Tue, 6 Aug 2013 15:34:12 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 82E892486; Tue, 6 Aug 2013 15:34:12 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r76FYC9k050214; Tue, 6 Aug 2013 15:34:12 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r76FYCa3050212; Tue, 6 Aug 2013 15:34:12 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <201308061534.r76FYCa3050212@svn.freebsd.org> From: Marius Strobl Date: Tue, 6 Aug 2013 15:34:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r253994 - in head/sys/sparc64: include sparc64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Aug 2013 15:34:12 -0000 Author: marius Date: Tue Aug 6 15:34:11 2013 New Revision: 253994 URL: http://svnweb.freebsd.org/changeset/base/253994 Log: Add MD (for now) atomic_store_acq_() and use it in pmap_activate() to get the semantics when setting the PMAP right. Prior to r251782, the latter already used implicit acquire semantics, which - currently - means to not employ additional explicit memory barriers under the hood (see also r225889). Modified: head/sys/sparc64/include/atomic.h head/sys/sparc64/sparc64/pmap.c Modified: head/sys/sparc64/include/atomic.h ============================================================================== --- head/sys/sparc64/include/atomic.h Tue Aug 6 14:41:41 2013 (r253993) +++ head/sys/sparc64/include/atomic.h Tue Aug 6 15:34:11 2013 (r253994) @@ -133,14 +133,14 @@ t; \ }) -#define atomic_load_acq(p, sz) ({ \ +#define atomic_ld_acq(p, sz) ({ \ itype(sz) v; \ v = atomic_cas((p), 0, 0, sz); \ __compiler_membar(); \ v; \ }) -#define atomic_load_clear(p, sz) ({ \ +#define atomic_ld_clear(p, sz) ({ \ itype(sz) e, r; \ for (e = *(volatile itype(sz) *)(p);; e = r) { \ r = atomic_cas((p), e, 0, sz); \ @@ -150,9 +150,8 @@ e; \ }) -#define atomic_store_rel(p, v, sz) do { \ +#define atomic_st(p, v, sz) do { \ itype(sz) e, r; \ - membar(LoadStore | StoreStore); \ for (e = *(volatile itype(sz) *)(p);; e = r) { \ r = atomic_cas((p), e, (v), sz); \ if (r == e) \ @@ -160,6 +159,16 @@ } \ } while (0) +#define atomic_st_acq(p, v, sz) do { \ + atomic_st((p), (v), sz); \ + __compiler_membar(); \ +} while (0) + +#define atomic_st_rel(p, v, sz) do { \ + membar(LoadStore | StoreStore); \ + atomic_st((p), (v), sz); \ +} while (0) + #define ATOMIC_GEN(name, ptype, vtype, atype, sz) \ \ static __inline vtype \ @@ -224,7 +233,7 @@ atomic_load_acq_ ## name(volatile ptype static __inline vtype \ atomic_readandclear_ ## name(volatile ptype p) \ { \ - return ((vtype)atomic_load_clear((p), sz)); \ + return ((vtype)atomic_ld_clear((p), sz)); \ } \ \ static __inline vtype \ @@ -260,9 +269,14 @@ atomic_subtract_rel_ ## name(volatile pt } \ \ static __inline void \ +atomic_store_acq_ ## name(volatile ptype p, vtype v) \ +{ \ + atomic_st_acq((p), (v), sz); \ +} \ +static __inline void \ atomic_store_rel_ ## name(volatile ptype p, vtype v) \ { \ - atomic_store_rel((p), (v), sz); \ + atomic_st_rel((p), (v), sz); \ } ATOMIC_GEN(int, u_int *, u_int, u_int, 32); @@ -284,8 +298,10 @@ ATOMIC_GEN(ptr, uintptr_t *, uintptr_t, #undef atomic_op #undef atomic_op_acq #undef atomic_op_rel -#undef atomic_load_acq -#undef atomic_store_rel -#undef atomic_load_clear +#undef atomic_ld_acq +#undef atomic_ld_clear +#undef atomic_st +#undef atomic_st_acq +#undef atomic_st_rel #endif /* !_MACHINE_ATOMIC_H_ */ Modified: head/sys/sparc64/sparc64/pmap.c ============================================================================== --- head/sys/sparc64/sparc64/pmap.c Tue Aug 6 14:41:41 2013 (r253993) +++ head/sys/sparc64/sparc64/pmap.c Tue Aug 6 15:34:11 2013 (r253994) @@ -2245,7 +2245,7 @@ pmap_activate(struct thread *td) pm->pm_context[curcpu] = context; #ifdef SMP CPU_SET_ATOMIC(PCPU_GET(cpuid), &pm->pm_active); - atomic_store_rel_ptr((uintptr_t *)PCPU_PTR(pmap), (uintptr_t)pm); + atomic_store_acq_ptr((uintptr_t *)PCPU_PTR(pmap), (uintptr_t)pm); #else CPU_SET(PCPU_GET(cpuid), &pm->pm_active); PCPU_SET(pmap, pm);