From owner-freebsd-arm@FreeBSD.ORG Mon Dec 3 17:43:13 2012 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 16DE33EA for ; Mon, 3 Dec 2012 17:43:13 +0000 (UTC) (envelope-from aoyama@peach.ne.jp) Received: from moon.peach.ne.jp (moon.peach.ne.jp [203.141.148.98]) by mx1.freebsd.org (Postfix) with ESMTP id 729358FC17 for ; Mon, 3 Dec 2012 17:43:11 +0000 (UTC) Received: from moon.peach.ne.jp (localhost [127.0.0.1]) by moon.peach.ne.jp (Postfix) with ESMTP id C0FF039D49; Tue, 4 Dec 2012 02:43:09 +0900 (JST) Received: from artemis (unknown [172.18.0.20]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by moon.peach.ne.jp (Postfix) with ESMTPSA id AB21739D46; Tue, 4 Dec 2012 02:43:09 +0900 (JST) Message-ID: <797FC9C0D52846548418B1E8F70A0402@ad.peach.ne.jp> From: "Daisuke Aoyama" To: "Ian Lepore" , "Warner Losh" , References: <3988C1622A974F19A9D3888F0334FF10@ad.peach.ne.jp> <50B8058C.9030909@bluezbox.com> <18DB98C9-66D9-4B00-989A-156F21E9981C@bsdimp.com> <1354552432.1140.28.camel@revolution.hippie.lan> In-Reply-To: <1354552432.1140.28.camel@revolution.hippie.lan> Subject: Re: FreeBSD on Raspberry Pi 512MB (with U-Boot + ubldr) Date: Tue, 4 Dec 2012 02:43:23 +0900 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal Importance: Normal X-Mailer: Microsoft Windows Live Mail 14.0.8117.416 X-MimeOLE: Produced By Microsoft MimeOLE V14.0.8117.416 X-Virus-Scanned: ClamAV using ClamSMTP Cc: Ralf.Wenk@hs-karlsruhe.de X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Dec 2012 17:43:13 -0000 > SD 2.0 upped the limit to 50mhz, but you can't set the bus to run that > fast until you've probed the card and determined that it supports SDHC. > The signaling standard is actually different between 1.x and 2.x in SDHC > mode (there are differences in the relationships between rise/fall/hold > times above 25mhz). That's why old Atmel hardware can't do SDHC 50mhz > even though the microcontroller can run the bus at 50mhz -- it does so > with the 1.x signal timings (it was pretty sneaky of them to adverise > mmc/sd up to 50mhz knowing that running the bus that fast was just a > violation of the SD 1.x spec, which is all they really support). > > I've heard that SD 3.x allows for bus speeds of 100mhz and higher, but > only on SDXC cards. I'm hand-waving a bit here because I haven't gotten > to work with hardware that new yet. Yes, you are right. But my card don't work with 50/100MHz 4bit mode. And, many users have reported don't work. In my case, the command under 50/100 was reported CRC error, etc. FYI, the cards require 2x max power consumption when HS mode is enabled. There is another factor the card runs at HS on RPI. I imagine my card eats more power :) > Bus speed is independant of the 1/4/8 bit datapath (well, at least in > the SD specs up through 2.0, after that I'm not sure). AFAIK, micro SD cards use 1bit. If you are interesting about SD card, you can get Simplified Version of the Physical Layer Specification https://www.sdcard.org/downloads/pls/ -- Daisuke Aoyama