From owner-freebsd-hackers Thu May 16 10:15:11 1996 Return-Path: owner-hackers Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id KAA17770 for hackers-outgoing; Thu, 16 May 1996 10:15:11 -0700 (PDT) Received: from phaeton.artisoft.com (phaeton.Artisoft.COM [198.17.250.211]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id KAA17765; Thu, 16 May 1996 10:15:07 -0700 (PDT) Received: (from terry@localhost) by phaeton.artisoft.com (8.6.11/8.6.9) id KAA17376; Thu, 16 May 1996 10:12:33 -0700 From: Terry Lambert Message-Id: <199605161712.KAA17376@phaeton.artisoft.com> Subject: Re: EDO & Memory latency To: dyson@freebsd.org Date: Thu, 16 May 1996 10:12:33 -0700 (MST) Cc: babkin@hq.icb.chel.su, hackers@freebsd.org In-Reply-To: <199605160613.BAA07537@dyson.iquest.net> from "John S. Dyson" at May 16, 96 01:13:11 am X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > There are several things going on. One is that there is propagation > time through to the main memory, it is much worse than the memory cycle > time. Of course, that does not account for all of the 400 nsecs that you > are seeing. Only about 280uS. The other 120uS are 20uS for the kernel trap and another 100uS in unrelated overhead. > You likely are seeing TLB overhead intrinsic to the processor. Some > processors don't have microcode TLB management, and you'll see worse > numbers, because the TLB needs to be handled in normal machine/assembly > code. (Of course, on those processors, you can tune the TLB management > more freely.) Some non-Intel procesors, like the Alpha and PPC, he means. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.