From owner-svn-src-all@FreeBSD.ORG Sun Mar 1 22:50:14 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B7D17106566C; Sun, 1 Mar 2009 22:50:14 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A621C8FC15; Sun, 1 Mar 2009 22:50:14 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n21MoELL056708; Sun, 1 Mar 2009 22:50:14 GMT (envelope-from mav@svn.freebsd.org) Received: (from mav@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n21MoEuK056707; Sun, 1 Mar 2009 22:50:14 GMT (envelope-from mav@svn.freebsd.org) Message-Id: <200903012250.n21MoEuK056707@svn.freebsd.org> From: Alexander Motin Date: Sun, 1 Mar 2009 22:50:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r189256 - head/sys/dev/ata/chipsets X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 01 Mar 2009 22:50:15 -0000 Author: mav Date: Sun Mar 1 22:50:14 2009 New Revision: 189256 URL: http://svn.freebsd.org/changeset/base/189256 Log: Give controller a chance to issue Soft Reset clear command before checking ready status. Most of controllers managed to issue coommand and set BUSY bit almost simultaneously, before we will read it, but at least JMicron JMB363 don't. Ignore timeout errors to keep old behavior when error there was impossible. For me this fixes timeout errors on the first command after channel attach or reinit. Boot in my case is not affected, as there is much time passing between reset and next command giving reset time to complete. Modified: head/sys/dev/ata/chipsets/ata-ahci.c Modified: head/sys/dev/ata/chipsets/ata-ahci.c ============================================================================== --- head/sys/dev/ata/chipsets/ata-ahci.c Sun Mar 1 22:48:18 2009 (r189255) +++ head/sys/dev/ata/chipsets/ata-ahci.c Sun Mar 1 22:50:14 2009 (r189256) @@ -683,8 +683,7 @@ ata_ahci_softreset(device_t dev, int por ctp->cfis[1] = port & 0x0f; //ctp->cfis[7] = ATA_D_LBA | ATA_D_IBM; ctp->cfis[15] = ATA_A_4BIT; - if (ata_ahci_issue_cmd(dev, 0, 0)) - return -1; + ata_ahci_issue_cmd(dev, 0, 1000); if (ata_ahci_wait_ready(dev, 1000)) { device_printf(dev, "software reset clear timeout\n");