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Date:      Thu, 14 Sep 1995 11:02:39 -0700 (PDT)
From:      Jake Hamby <jehamby@lightside.com>
To:        Richard Hesketh <R.L.Hesketh@ukc.ac.uk>
Cc:        hackers@freebsd.org, questions@freebsd.org
Subject:   Re: Does FreeBSD suffer from the Intel RZ1000 IDE bug?
Message-ID:  <Pine.BSF.3.91.950914105450.371A-100000@localhost>
In-Reply-To: <21264.811096337@crane>

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On Thu, 14 Sep 1995, Richard Hesketh wrote:

> I've read that Intel have a bug in their RZ1000 controller chip
> found on some of their PCI motherboards (and guess what motherboard
> I have 8-)

This is DEFINITELY something for the FreeBSD team to verify (maybe even 
before 2.1.0 is released)!  This IDE bug often causes the last 32 bits of 
data transfer to get mangled, especially if there is some other DMA 
transfer occurring at the same time.  Fortunately, none of my computers 
are affected, but think of the bad publicity for FreeBSD if people start 
blaming it for corrupting their HD partitions!

> The full details are given under:
> 
> http://www.intel.com/procs/support/rz1000/index.html

There's a white paper on this page which should be helpful to anyone who 
wants to patch the IDE driver, as well as a DOS detection utility for the 
buggy chips.

> Linux is listed as being affected and I was wondering if FreeBSD
> was as well or if a fixed driver is available and from what version
> of FreeBSD is it in?

For those interested in conspiracy theories, Intel knew about this 
problem for at least a year, told Microsoft about it so they could fix 
their drivers in Windows NT 3.51 and Windows 95, but "forgot" to tell the 
customers...  About a serious potential source of irreparable data 
corruption!  Silly Intel...

> As a workaround I am turning off use of IDE Pre-fetch buffers
> in my BIOS setup (as recommended by Intel).

I'm not sure this will solve the problem for FreeBSD, since FreeBSD 
doesn't use the BIOS for data transfers.  Also, this workaround does slow 
down transfer rates, while the ideal method is to patch the IDE driver to 
only read the status register after the data transfer is finished (see 
the white paper for a better description of the issue).

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     Jake Hamby                         |   E-Mail:  jehamby@lightside.com
  Student, Cal Poly University, Pomona  |   System Administrator, JPL
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