From owner-p4-projects@FreeBSD.ORG Wed Feb 15 01:53:45 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 5356216A423; Wed, 15 Feb 2006 01:53:45 +0000 (GMT) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id EA45A16A422 for ; Wed, 15 Feb 2006 01:53:44 +0000 (GMT) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id DC1AB43D55 for ; Wed, 15 Feb 2006 01:53:41 +0000 (GMT) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.1/8.13.1) with ESMTP id k1F1rfLf062360 for ; Wed, 15 Feb 2006 01:53:41 GMT (envelope-from kmacy@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.1/8.13.1/Submit) id k1F1rf25062357 for perforce@freebsd.org; Wed, 15 Feb 2006 01:53:41 GMT (envelope-from kmacy@freebsd.org) Date: Wed, 15 Feb 2006 01:53:41 GMT Message-Id: <200602150153.k1F1rf25062357@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to kmacy@freebsd.org using -f From: Kip Macy To: Perforce Change Reviews Cc: Subject: PERFORCE change 91778 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Feb 2006 01:53:46 -0000 http://perforce.freebsd.org/chv.cgi?CH=91778 Change 91778 by kmacy@kmacy_storage:sun4v_work on 2006/02/15 01:52:58 Update ASIs for UltraSPARC Architecture 2005 Affected files ... .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asi.h#2 edit Differences ... ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asi.h#2 (text+ko) ==== @@ -1,5 +1,5 @@ /*- - * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. + * Copyright (c) 2006 Kip Macy * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -9,9 +9,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. Berkeley Software Design Inc's name may not be used to endorse or - * promote products derived from this software without specific prior - * written permission. * * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE @@ -33,83 +30,89 @@ #define _MACHINE_ASI_H_ /* - * sun4v ASIs + * UltraSPARC Architecture 2005 ASIs */ -#define ASI_N 0x4 -#define ASI_NL 0xc -#define ASI_AIUP 0x10 -#define ASI_AIUS 0x11 -#define ASI_AIUPL 0x18 -#define ASI_AIUSL 0x19 -#define ASI_P 0x80 -#define ASI_S 0x81 -#define ASI_PNF 0x82 -#define ASI_SNF 0x83 -#define ASI_PL 0x88 -#define ASI_SL 0x89 -#define ASI_PNFL 0x8a -#define ASI_SNFL 0x8b +#define ASI_N 0x04 /* ASI_NUCLEUS */ + +#define ASI_NL 0x0c /* ASI_NUCLEUS_LITTLE */ + +#define ASI_AIUP 0x10 /* ASI_AS_IF_USER_PRIMARY */ +#define ASI_AIUS 0x11 /* ASI_AS_IF_USER_SECONDARY */ + +#define ASI_REAL 0x14 +#define ASI_REAL_IO 0x15 +#define ASI_BLK_AIUP 0x16 /* ASI_BLOCK_AS_IF_USER_PRIMARY */ +#define ASI_BLK_AIUS 0x17 /* ASI_BLOCK_AS_IF_USER_SECONDARY */ +#define ASI_AIUPL 0x18 /* ASI_AS_IF_USER_PRIMARY_LITTLE */ +#define ASI_AIUSL 0x19 /* ASI_AS_IF_USER_SECONDARY_LITTLE */ + +#define ASI_REAL_L 0x1C /* ASI_REAL_LITTLE */ +#define ASI_REAL_IO_L 0x1D /* ASI_REAL_IO_LITTLE */ +#define ASI_BLK_AIUPL 0x1E /* ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE */ +#define ASI_BLK_AIUSL 0x1F /* ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE */ +#define ASI_SCRATCHPAD 0x20 +#define ASI_MMU_CONTEXTID 0x21 +#define ASI_LDTD_AIUP 0x22 /* ASI_LOAD_TWIN_DW_AS_IF_USER_PRIMARY */ +#define ASI_LDTD_AIUS 0x23 /* ASI_LOAD_TWIN_DW_AS_IF_USER_SECONDARY */ +#define ASI_QUEUE 0x25 +#define ASI_LDTD_REAL 0x26 /* ASI_LOAD_TWIN_DW_REAL */ +#define ASI_LDTD_N 0x27 /* ASI_LOAD_TWIN_DW_NUCLEUS */ + +#define ASI_LDTD_AIUPL 0x2A /* ASI_LD_TWIN_DW_AS_IF_USER_PRIMARY_LITTLE */ +#define ASI_LDTD_AIUSL 0x2B /* ASI_LD_TWIN_DW_AS_IF_USER_SECONDARY_LITTLE */ + +#define ASI_LDTD_REAL_L 0x2E /* ASI_LOAD_TWIN_DW_REAL_LITTLE */ +#define ASI_LDTD_NL 0x2F /* ASI_LOAD_TWIN_DW_NUCLEUS_LITTLE */ + + + +#define ASI_P 0x80 /* ASI_PRIMARY */ +#define ASI_S 0x81 /* ASI_SECONDARY */ +#define ASI_PNF 0x82 /* ASI_PRIMARY_NO_FAULT */ +#define ASI_SNF 0x83 /* ASI_SECONDARY_NO_FAULT */ + +#define ASI_PL 0x88 /* ASI_PRIMARY_LITTLE */ +#define ASI_SL 0x89 /* ASI_SECONDARY_LITTLE */ +#define ASI_PNFL 0x8a /* ASI_PRIMARY_NO_FAULT_LITTLE */ +#define ASI_SNFL 0x8b /* ASI_SECONDARY_NO_FAULT_LITTLE */ + +#define ASI_PST8_P 0xc0 +#define ASI_PST8_S 0xc1 +#define ASI_PST16_P 0xc2 +#define ASI_PST16_S 0xc3 +#define ASI_PST32_P 0xc4 +#define ASI_PST32_S 0xc5 + + +#define ASI_PST8_PL 0xc8 +#define ASI_PST8_SL 0xc9 +#define ASI_PST16_PL 0xca +#define ASI_PST16_SL 0xcb +#define ASI_PST32_PL 0xcc +#define ASI_PST32_SL 0xcd + +#define ASI_FL8_P 0xd0 +#define ASI_FL8_S 0xd1 +#define ASI_FL16_P 0xd2 +#define ASI_FL16_S 0xd3 -/* - * UltraSPARC extensions. ASIs limited to a certain family are annotated. - */ -#define ASI_PHYS_USE_EC 0x14 -#define ASI_PHYS_BYPASS_EC_WITH_EBIT 0x15 -#define ASI_PHYS_USE_EC_L 0x1c -#define ASI_PHYS_BYPASS_EC_WITH_EBIT_L 0x1d +#define ASI_FL8_PL 0xd8 +#define ASI_FL8_SL 0xd9 +#define ASI_FL16_PL 0xda +#define ASI_FL16_SL 0xdb -#define ASI_NUCLEUS_QUAD_LDD 0x24 -#define ASI_NUCLEUS_QUAD_LDD_L 0x2c +#define ASI_LDTD_P 0xe2 /* ASI_LOAD_TWIN_DW_PRIMARY */ +#define ASI_LDTD_S 0xe3 /* ASI_LOAD_TWIN_DW_SECONDARY */ -#define AA_IMMU_TTR 0x0 -#define AA_IMMU_SFSR 0x18 -#define AA_IMMU_TSB 0x28 -#define AA_IMMU_TAR 0x30 -#define AA_DMMU_TTR 0x0 -#define AA_DMMU_PCXR 0x8 -#define AA_DMMU_SCXR 0x10 -#define AA_DMMU_SFSR 0x18 -#define AA_DMMU_SFAR 0x20 -#define AA_DMMU_TSB 0x28 -/* - * With the advent of the US-III, the numbering has changed, as additional - * registers were inserted in between. We retain the original ordering for - * now, and append an A to the inserted registers. - * Exceptions are AA_SDB_INTR_D6 and AA_SDB_INTR_D7, which were appended - * at the end. - */ -#define AA_SDB_INTR_D0 0x40 -#define AA_SDB_INTR_D1 0x50 -#define AA_SDB_INTR_D2 0x60 +#define ASI_LDTD_PL 0xea /* ASI_LOAD_TWIN_DW_PRIMARY_LITTLE */ +#define ASI_LDTD_SL 0xeb /* ASI_LOAD_TWIN_DW_SECONDARY_LITTLE */ -#define ASI_PST8_P 0xc0 -#define ASI_PST8_S 0xc1 -#define ASI_PST16_P 0xc2 -#define ASI_PST16_S 0xc3 -#define ASI_PST32_P 0xc4 -#define ASI_PST32_S 0xc5 +#define ASI_BLK_P 0xf0 /* ASI_BLOCK_PRIMARY */ +#define ASI_BLK_S 0xf1 /* ASI_BLOCK_SECONDARY */ -#define ASI_PST8_PL 0xc8 -#define ASI_PST8_SL 0xc9 -#define ASI_PST16_PL 0xca -#define ASI_PST16_SL 0xcb -#define ASI_PST32_PL 0xcc -#define ASI_PST32_SL 0xcd +#define ASI_BLK_PL 0xf8 /* ASI_BLOCK_PRIMARY_LITTLE */ +#define ASI_BLK_SL 0xf9 /* ASI_BLOCK_SECONDARY_LITTLE */ -#define ASI_FL8_P 0xd0 -#define ASI_FL8_S 0xd1 -#define ASI_FL16_P 0xd2 -#define ASI_FL16_S 0xd3 -#define ASI_FL8_PL 0xd8 -#define ASI_FL8_SL 0xd9 -#define ASI_FL16_PL 0xda -#define ASI_FL16_SL 0xdb -#define ASI_BLK_COMMIT_P 0xe0 -#define ASI_BLK_COMMIT_S 0xe1 -#define ASI_BLK_P 0xf0 -#define ASI_BLK_S 0xf1 -#define ASI_BLK_PL 0xf8 -#define ASI_BLK_SL 0xf9 #endif /* !_MACHINE_ASI_H_ */