From owner-freebsd-arch@freebsd.org Mon Jul 25 16:48:33 2016 Return-Path: Delivered-To: freebsd-arch@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C15FCBA46BF; Mon, 25 Jul 2016 16:48:33 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from c.mail.sonic.net (c.mail.sonic.net [64.142.111.80]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A8EDD189C; Mon, 25 Jul 2016 16:48:33 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from aurora.physics.berkeley.edu (aurora.physics.berkeley.edu [128.32.117.67]) (authenticated bits=0) by c.mail.sonic.net (8.15.1/8.15.1) with ESMTPSA id u6PGmOF8026555 (version=TLSv1.2 cipher=DHE-RSA-AES128-SHA bits=128 verify=NOT); Mon, 25 Jul 2016 09:48:25 -0700 Subject: Re: INTRNG (Was: svn commit: r301453....) To: Warner Losh References: <201606051620.u55GKD5S066398@repo.freebsd.org> <578E0B5D.3070105@FreeBSD.org> <578F6075.7010500@FreeBSD.org> <05a80ac6-4285-ec9d-36e9-2f92c609f746@freebsd.org> <57907B0F.9070204@FreeBSD.org> <9d2a224c-b787-2875-5984-a7a2354e8695@freebsd.org> <57934ABD.6010807@FreeBSD.org> <4e7a3e8f-cc21-f5f2-e3e0-4dbd554a4cd0@freebsd.org> <5794720F.4050303@FreeBSD.org> <8bfd8668-bc49-e109-e610-b5cd470be3ec@freebsd.org> <57950005.6070403@FreeBSD.org> <57961549.4020105@FreeBSD.org> Cc: Michal Meloun , Svatopluk Kraus , "freebsd-arch@freebsd.org" , "freebsd-arm@freebsd.org" From: Nathan Whitehorn Message-ID: Date: Mon, 25 Jul 2016 09:48:24 -0700 User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:45.0) Gecko/20100101 Thunderbird/45.1.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Sonic-CAuth: UmFuZG9tSVaSaSSOA20ymKx7VTUGGfy3r3xuPzV4lk/S++AVRaPyu3KE3BCJ3ljiLPFGLXxQ8TdHwi6TjuvbDozWsZQRiTuTHu0iM9dKFmc= X-Sonic-ID: C;6riHmodS5hG61ZtMTlz00w== M;1gbQmodS5hG61ZtMTlz00w== X-Spam-Flag: No X-Sonic-Spam-Details: 0.0/5.0 by cerberusd X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Jul 2016 16:48:33 -0000 On 07/25/16 09:32, Warner Losh wrote: > On Mon, Jul 25, 2016 at 8:05 AM, Nathan Whitehorn > wrote: >> That wasn't my question. Are these particular device drivers allocating >> interrupts both on the GPIOs in their "interrupts" property (which are >> entirely GPIOs in this example) *and* on the GPIOs listed as resources but >> not listed as interrupts? If they are, then you need a switching mechanism, >> but that seems pretty unlikely given the names of the non-interrupt GPIOs >> (they look like outputs). It would also be a somewhat deranged way to set up >> a device tree -- not that that rules it out or anything. > On Atmel, there's a situation that this covers, I think. > > The MCI device has an interrupt in the core: > > mmc0: mmc@fffa8000 { > compatible = "atmel,hsmci"; > reg = <0xfffa8000 0x600>; > interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; > #address-cells = <1>; > #size-cells = <0>; > pinctrl-names = "default"; > clocks = <&mci0_clk>; > clock-names = "mci_clk"; > status = "disabled"; > }; > > and in other places wires in GPIO interrupts for things like card > eject / insertion. > > mmc0: mmc@f0008000 { > pinctrl-0 = < > &pinctrl_board_mmc0 > &pinctrl_mmc0_slot0_clk_cmd_dat0 > &pinctrl_mmc0_slot0_dat1_3>; > status = "okay"; > slot@0 { > reg = <0>; > bus-width = <4>; > cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>; > }; > }; > > an interrupt is registered on the cd-gpios pin for when the card changes. At > least in linux, FreeBSD doesn't (yet) implement this, but will someday if I get > back to the armv6 atmel work I started (see at91-cosino.dts for example, there's > others). > > I think this is an example of what you are asking about, or did I get > lost in the > twisty maze of conversation zigs and zags... > > Warner > Where we would run into (minor) problems is if the interrupt parent for the first mmc0 is the GPIO controller. More generally, if &pioD has interrupt children specified in some way that is not a tuple somewhere else in the tree then you would have to have methods to parse both interrupt specifiers as-obtained-from-interrupts-properties (or equivalent) and specifiers as-obtained-from-gpio-properties. If the tree picks one format and sticks with it, you can get away with just the one. Glancing through the DTS source for this board, that doesn't appear to be the case and the property formatting is uniform, but I might have missed something in one of the many #includes. As a general point, GPIO weirdness would be easy enough case to handle if it did come up (add some mapping method, as above) that I think we shouldn't worry too much about it from an architectural point of view. If a board appears that is set up this way, we can roll with the punches at that point and add whatever small amount of shim code that is required. It would be annoyance, sure, but not a real complication. -Nathan