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From: Pyun YongHyeon <yongari@FreeBSD.org>
Date: Thu, 29 Apr 2010 18:00:42 +0000 (UTC)
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Subject: cvs commit: src/sys/dev/sge if_sge.c if_sgereg.h
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yongari     2010-04-29 18:00:42 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/sge          if_sge.c if_sgereg.h 
  Log:
  SVN rev 207379 on 2010-04-29 18:00:42Z by yongari
  
  Enable FCS stripping and padding 10 bytes bit of RX MAC control
  register. Due to lack of SiS190 controller, I'm not sure whether
  this is also applicable to SiS190 so this feature is only activated
  on SiS191 controller.
  The controller can pad 10 bytes before DMAing a received frame to
  RX buffer and received bytes include the padded bytes. This padding
  is very useful on strict-alignment architectures because driver
  does not have to copy received frame to align IP header on 4 bytes
  boundary. It also gives better RX performance on non-strict
  alignment architectures. Special thanks to xclin to give me
  valuable register information. Without his enthusiastic trial and
  errors this wouldn't be even possible.
  
  While I'm here tighten validity check of received frame. Controller
  clears RDS_CRCOK bit when it received bad CRC frames. xclin found
  that using loop back testing.
  
  Tested by:      xclin <xclin <> cs dot nctu dot edu dot tw >
  
  Revision  Changes    Path
  1.7       +28 -5     src/sys/dev/sge/if_sge.c
  1.3       +4 -0      src/sys/dev/sge/if_sgereg.h