From owner-cvs-sys Fri May 10 09:27:08 1996 Return-Path: owner-cvs-sys Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id JAA02486 for cvs-sys-outgoing; Fri, 10 May 1996 09:27:08 -0700 (PDT) Received: (from gibbs@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id JAA02464 Fri, 10 May 1996 09:26:46 -0700 (PDT) Date: Fri, 10 May 1996 09:26:46 -0700 (PDT) From: "Justin T. Gibbs" Message-Id: <199605101626.JAA02464@freefall.freebsd.org> To: CVS-committers, cvs-all, cvs-sys Subject: cvs commit: src/sys/dev/aic7xxx aic7xxx.seq aic7xxx_reg.h src/sys/i386/eisa aic7770.c src/sys/i386/scsi aic7xxx.c aic7xxx.h src/sys/pci aic7870.c Sender: owner-cvs-sys@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk gibbs 96/05/10 09:26:44 Modified: sys/dev/aic7xxx aic7xxx.seq aic7xxx_reg.h Log: aic7xxx.seq: Change #ifdef linux to #ifdef __linux__ aic7xxx_reg.h: Remove unneeded BOFF_60BCLOCKS define CHIPRSTACK to be the same as CHIPRST define RESET_SCSI and CHANNEL_B_PRIMARY bits All of these aer used during the setup of adapters. Revision Changes Path 1.34 +2 -2 src/sys/dev/aic7xxx/aic7xxx.seq 1.9 +5 -2 src/sys/dev/aic7xxx/aic7xxx_reg.h Modified: sys/i386/eisa aic7770.c Log: Honor the CHANNEL_B_PRIMARY bit of the BIOSCTRL register and probe channel B first as approriate. Even if the BIOS is diabled, the ECU will still set the primary channel bit, SCSI ID, RESET_SCSI bit, and BOFF_TIME, so use them. Revision Changes Path 1.28 +13 -21 src/sys/i386/eisa/aic7770.c Modified: sys/i386/scsi aic7xxx.c aic7xxx.h Log: Honor the CHANNEL_B_PRIMARY bit of the BIOSCTRL register and probe channel B first as approriate. Only reset the SCSI bus if the RESET_SCSI bit of SCSICONF is set. This makes the aic7xxx driver honor all of the configuration settings availible in SCSI-Select or the ECU. Fix a benign bug in the reset code that caused us to always wait a full second after the chip reset. This should shave some time off the probe. Bug found by pedrosal@nce.ufrj.br (Pedro Salenbauch) It seems that only the top three sync rates are doubled when in ultra mode, so update the syncrates table as appropriate. Found by "Dan Willis" and his SCSI bus analyzer Revision Changes Path 1.66 +119 -61 src/sys/i386/scsi/aic7xxx.c 1.27 +32 -24 src/sys/i386/scsi/aic7xxx.h Modified: sys/pci aic7870.c Log: The aic78X0 cards have 0xff in all bytes of scratch ram after POST. If a BIOS was not installed, this will still be true by the time we probe the chip. We use this heuristic to determine if we should use the left over scratch ram target settings for controllers that don't have an SEEPROM. We also "snapshot" the host adapter SCSI id and whether ultra is enabled or not and use these values if a BIOS was installed. The card will act as if a BIOS was installed even if there wasn't one if you warm reboot, but since the scratch ram area is still valid in this case, its hardly worth the effort of writing a shutdown routing that clears out the scratch ram. This should make users of motherboard controllers happy. Revision Changes Path 1.30 +58 -30 src/sys/pci/aic7870.c