Date: Sat, 3 May 2014 02:09:46 +0200 From: Bernd Walter <ticso@cicely7.cicely.de> To: Winston Smith <smith.winston.101@gmail.com> Cc: FreeBSD ARM <freebsd-arm@freebsd.org> Subject: Re: BBB/I2C: Read PMIC data Message-ID: <20140503000946.GK52252@cicely7.cicely.de> In-Reply-To: <CADH-AwER3hMhwY2i%2BJh4Fe04ZLYcRQ-e0gy==eotPgyZ0ZOnDA@mail.gmail.com> References: <CADH-AwGbnqzGqbzpV9YMgdOciLpoy3fqxF1RtCmMPZtgc%2BAcXg@mail.gmail.com> <53633440.3070702@hot.ee> <CADH-AwHKKXDTotrk_tQMsZ0WToyk55JgZEmLk0AkHJzGLiGKvA@mail.gmail.com> <C419C325-4354-4490-B7A8-29F4A606FD47@bsdimp.com> <CADH-AwER3hMhwY2i%2BJh4Fe04ZLYcRQ-e0gy==eotPgyZ0ZOnDA@mail.gmail.com>
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On Fri, May 02, 2014 at 04:46:02PM -0400, Winston Smith wrote: > On Fri, May 2, 2014 at 11:30 AM, Warner Losh <imp@bsdimp.com> wrote: > > Only if the kernel is actively accessing them so your transactions are messed up. > > In the kernel, all the bridge knows about is transactions of one flavor or another. > > This may indicate a more fundamental issue going on, either in your belief that > > it is at 24, or in the address (which is 7 bits) gets translated to 8 bits. Try a left > > shift 1 bit. > > Alright, figured it out. The "dummy" write that precedes the read is > not a dummy, you're sending a command to the I2C device. For a > EEPROM, you send it a 2 byte address of where to read. For the PMIC, > you need to send it a *1-byte* register ID! > > I've updated the tool and renamed it `bbb_sysutil.c`: > > http://pastebin.com/NhMy9D7d > > Here's the output (still working on the "interrupt storm" issue!): > > root@beaglebone:~ # ./bbb_sysutil > TPS65217 PMIC @ address 24: > ChipID: E2 TPS65217C rev 1.2 > Status: 08 ACPWR > interrupt storm detected on "intr70:"; throttling interrupt source > EEPROM @ address 50: signature=AA:55:33:EE > Model: A335BNLT0A6A > Serial: 0214BBBK4321 So you get valid data. Sounds like the interupt handler is working for what it needs, but not closing an interrupt down. Since most part of acknowleging an interrupt to the hardware is the same for all interrupt sources I expect the IIC controller isn't made aware that an interrupt was processed. One wild guess - without knowing the Sitara IIC controller at all: You write and read in one transaction, the controller may issue an interrupt on read and write, but only the read is handled, so the write interrupt stays active. It could also bee that the controler signals other states, which are unhandled - e.g. addressed device acknowledge. Just read in the datasheet what kind of interrupts it can send. Usually it is a flag register. Read and printf it in the int service and check if one of the signalled interrupts is unhandled. Some interrupt sources might need manual shutdown, while others do not - e.g. data ready is often automatically done when reading the data register and other need to be cleared by writing into a register. > Let me know if there is any more data you want from the PMIC. > > -W > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" -- B.Walter <bernd@bwct.de> http://www.bwct.de Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.
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