From owner-freebsd-current@FreeBSD.ORG Tue Nov 23 01:01:50 2010 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E3DA71065673; Tue, 23 Nov 2010 01:01:50 +0000 (UTC) (envelope-from alc@rice.edu) Received: from mh1.mail.rice.edu (mh1.mail.rice.edu [128.42.201.20]) by mx1.freebsd.org (Postfix) with ESMTP id ABC918FC13; Tue, 23 Nov 2010 01:01:50 +0000 (UTC) Received: from mh1.mail.rice.edu (localhost.localdomain [127.0.0.1]) by mh1.mail.rice.edu (Postfix) with ESMTP id 95D1228F7BC; Mon, 22 Nov 2010 19:01:49 -0600 (CST) X-Virus-Scanned: by amavis-2.6.4 at mh1.mail.rice.edu, auth channel Received: from mh1.mail.rice.edu ([127.0.0.1]) by mh1.mail.rice.edu (mh1.mail.rice.edu [127.0.0.1]) (amavis, port 10026) with ESMTP id osLpACLjblQn; Mon, 22 Nov 2010 19:01:49 -0600 (CST) Received: from [10.209.194.7] (unknown [10.209.194.7]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (No client certificate requested) (Authenticated sender: alc) by mh1.mail.rice.edu (Postfix) with ESMTPSA id 48E9228F79F; Mon, 22 Nov 2010 19:01:49 -0600 (CST) Message-ID: <4CEB126E.2010509@rice.edu> Date: Mon, 22 Nov 2010 19:01:34 -0600 From: Alan Cox User-Agent: Mozilla/5.0 (Windows; U; Windows NT 6.1; en-US; rv:1.9.2.12) Gecko/20101027 Thunderbird/3.1.6 MIME-Version: 1.0 To: John Baldwin References: <1290387926.16558.1283.camel@home-yahoo> <201011220759.16082.jhb@freebsd.org> <201011221447.13026.jhb@freebsd.org> In-Reply-To: <201011221447.13026.jhb@freebsd.org> Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit X-Mailman-Approved-At: Tue, 23 Nov 2010 03:58:51 +0000 Cc: alc@freebsd.org, freebsd-current@freebsd.org, Sean Bruno Subject: Re: 40 vs 44 bit memory addressing HP DL580/980 X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Nov 2010 01:01:51 -0000 On 11/22/2010 1:47 PM, John Baldwin wrote: > On Monday, November 22, 2010 1:37:45 pm Alan Cox wrote: >> On Mon, Nov 22, 2010 at 6:59 AM, John Baldwin wrote: >> >>> On Sunday, November 21, 2010 8:05:26 pm Sean Bruno wrote: >>>> Looks like these HP boxes have the capability to do 44 bit memory >>>> addressing if configured to do so from the BIOS. >>>> >>>> Is anyone interested in any data from that setting? >>> Does it boot ok? :) The MTRR code should handle that (there is a CPUID >>> field that tells the OS how many bits are significant). Not sure if there >>> are any places in the pmap that assume 40 bits, but a test boot is >>> certainly >>> worth trying. >>> >>> >> Since we don't boot with 40-bit addressing, I can easily predict the >> outcome. :-) >> >> The trouble with this machine is that the second 128GB of RAM is being >> placed between 512G and 1T in the physical address space, which is beyond >> the range of the (current) direct map. So, we take a page fault on the >> first access to a page in the second 128GB through the direct map. > Heh, I guess that is what your earlier patch did? Once that patch is applied > I think Sean should just try 44-bit mode if so. > Yes. If 44-bit addressing makes the placement of DRAM in the physical address space any sparser, then we'll again have an insufficiently large direct map. Also, I fear that we won't be able to allocate the vm_page_array without enabling VM_PHYSSEG_SPARSE, which itself requires a change in order to work. Alan