From owner-svn-src-all@freebsd.org Sat May 11 18:31:07 2019 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8A2BC15A4321; Sat, 11 May 2019 18:31:07 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 2F6FA6C490; Sat, 11 May 2019 18:31:07 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 0D4C81F4D4; Sat, 11 May 2019 18:31:07 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x4BIV6Xl006797; Sat, 11 May 2019 18:31:06 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x4BIV6pi006793; Sat, 11 May 2019 18:31:06 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201905111831.x4BIV6pi006793@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Sat, 11 May 2019 18:31:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r347496 - in stable/12/sys/powerpc: fpu include powerpc X-SVN-Group: stable-12 X-SVN-Commit-Author: jhibbits X-SVN-Commit-Paths: in stable/12/sys/powerpc: fpu include powerpc X-SVN-Commit-Revision: 347496 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 2F6FA6C490 X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.95 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.995,0]; NEURAL_HAM_SHORT(-0.95)[-0.951,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US]; NEURAL_HAM_LONG(-1.00)[-1.000,0] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 May 2019 18:31:07 -0000 Author: jhibbits Date: Sat May 11 18:31:05 2019 New Revision: 347496 URL: https://svnweb.freebsd.org/changeset/base/347496 Log: MFC r345829, r345831 r345829: powerpc: Apply r178139 from sparc64 to powerpc's fpu_sqrt This fix was committed less than 2 months after the code was forked into the powerpc kernel. Though powerpc doesn't use quad-precision floating point, or need it for emulation, the changes do look like correctness fixes overall. This was found while trying to get fsqrt emulation working on e5500, which does have a real FPU, but lacks the fsqrt instruction. This is not the complete fix, the rest is to be committed separately. r345831: powerpc: Allow emulating optional FPU instructions on CPUs with an FPU The e5500 has an FPU, but lacks the optional fsqrt instruction. This instruction gets emulated in the kernel, but the emulation uses stale data, from the last switch out, and does not return the result of the operation immediately. Fix both of these conditions by saving and restoring the FPRs around the emulation point. Modified: stable/12/sys/powerpc/fpu/fpu_sqrt.c stable/12/sys/powerpc/include/trap.h stable/12/sys/powerpc/powerpc/exec_machdep.c stable/12/sys/powerpc/powerpc/trap.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/powerpc/fpu/fpu_sqrt.c ============================================================================== --- stable/12/sys/powerpc/fpu/fpu_sqrt.c Sat May 11 18:25:15 2019 (r347495) +++ stable/12/sys/powerpc/fpu/fpu_sqrt.c Sat May 11 18:31:05 2019 (r347496) @@ -353,7 +353,7 @@ fpu_sqrt(struct fpemu *fe) FPU_SUBC(d0, x0, t0); if ((int)d0 >= 0) { x0 = d0, x1 = d1, x2 = d2; - q |= bit; + q = bit; y1 |= 1; /* now t1, y1 are set in concrete */ } ODD_DOUBLE; @@ -385,12 +385,12 @@ fpu_sqrt(struct fpemu *fe) FPU_SUBCS(d2, x2, t2); FPU_SUBCS(d1, x1, t1); FPU_SUBC(d0, x0, t0); - ODD_DOUBLE; if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; - q |= bit; + x0 = d0, x1 = d1, x2 = d2; x3 = d3; + q = bit; y2 |= 1; } + ODD_DOUBLE; while ((bit >>= 1) != 0) { EVEN_DOUBLE; t3 = y3 | bit; @@ -399,7 +399,7 @@ fpu_sqrt(struct fpemu *fe) FPU_SUBCS(d1, x1, t1); FPU_SUBC(d0, x0, t0); if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; + x0 = d0, x1 = d1, x2 = d2; x3 = d3; q |= bit; y3 |= bit << 1; } Modified: stable/12/sys/powerpc/include/trap.h ============================================================================== --- stable/12/sys/powerpc/include/trap.h Sat May 11 18:25:15 2019 (r347495) +++ stable/12/sys/powerpc/include/trap.h Sat May 11 18:31:05 2019 (r347496) @@ -149,10 +149,10 @@ #ifndef LOCORE struct trapframe; -struct pcb; +struct thread; extern int (*hmi_handler)(struct trapframe *); void trap(struct trapframe *); -int ppc_instr_emulate(struct trapframe *, struct pcb *); +int ppc_instr_emulate(struct trapframe *, struct thread *); #endif #endif /* _POWERPC_TRAP_H_ */ Modified: stable/12/sys/powerpc/powerpc/exec_machdep.c ============================================================================== --- stable/12/sys/powerpc/powerpc/exec_machdep.c Sat May 11 18:25:15 2019 (r347495) +++ stable/12/sys/powerpc/powerpc/exec_machdep.c Sat May 11 18:31:05 2019 (r347496) @@ -1066,8 +1066,9 @@ emulate_mtspr(int spr, int reg, struct trapframe *fram #define XFX 0xFC0007FF int -ppc_instr_emulate(struct trapframe *frame, struct pcb *pcb) +ppc_instr_emulate(struct trapframe *frame, struct thread *td) { + struct pcb *pcb; uint32_t instr; int reg, sig; int rs, spr; @@ -1094,12 +1095,16 @@ ppc_instr_emulate(struct trapframe *frame, struct pcb return (0); } + pcb = td->td_pcb; #ifdef FPU_EMU if (!(pcb->pcb_flags & PCB_FPREGS)) { bzero(&pcb->pcb_fpu, sizeof(pcb->pcb_fpu)); pcb->pcb_flags |= PCB_FPREGS; - } + } else if (pcb->pcb_flags & PCB_FPU) + save_fpu(td); sig = fpu_emulate(frame, &pcb->pcb_fpu); + if ((sig == 0 || sig == SIGFPE) && pcb->pcb_flags & PCB_FPU) + enable_fpu(td); #endif return (sig); Modified: stable/12/sys/powerpc/powerpc/trap.c ============================================================================== --- stable/12/sys/powerpc/powerpc/trap.c Sat May 11 18:25:15 2019 (r347495) +++ stable/12/sys/powerpc/powerpc/trap.c Sat May 11 18:31:05 2019 (r347496) @@ -361,7 +361,7 @@ trap(struct trapframe *frame) sig = SIGTRAP; ucode = TRAP_BRKPT; } else { - sig = ppc_instr_emulate(frame, td->td_pcb); + sig = ppc_instr_emulate(frame, td); if (sig == SIGILL) { if (frame->srr1 & EXC_PGM_PRIV) ucode = ILL_PRVOPC;