From nobody Fri Jul 3 15:33:18 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4gsHp72Btmz6jkDt for ; Fri, 03 Jul 2026 15:33:19 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR1" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4gsHp70td1z3XmD for ; Fri, 03 Jul 2026 15:33:19 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1783092799; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=eOgPVSfGcdFegj8T3RY7gw5thRm595QqkcT+b9bEncQ=; b=sDk7nbgzCYsn5IUL4BfFvC0gjIGZ3rWkTOW95M5rZsvZqsi4HnsQuTfR2rV2JY7s1Fpdka 8RwQQtvXZkNRPWREyqFHkwFo0ao4Vl60l3iAw4M0HzC1fGuvZkImfeguVts+s37sHD5a6U qNCtYrdeaEL4KAakCO8Pf3JbDfgZF3pqtdSXlNplubK5KiJscooPVYFFC9RI56uS8vWtQQ h0J122Zg15ytxsaufoTus81oE7GPhu53dWq8j07xvkb4lpt6Ac7c7OyKqDt03hGArFLC3P v9jNrJsLrah0axnAoOkJoYCKXZqfPIrfL4EDKdzOW9LoDWyqrWf+PLTLHNy+zQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1783092799; a=rsa-sha256; cv=none; b=s4yepkTl61dmz0MQRcAJVsTkap9oCr7C8uePLVvjyfRAhDNvYWvPN8vHjX1TwcyYrdkSlk npBo4mGRzmupsE+VmyscXT/KfaktmPVPV8o9IfL+Qa38hmkkjJaFAnyGMpISSn8k6x9Toz 5UtDGsoRRLNzaKmvB9rWYqSr/Xrjv8OomXukbm6CWLWltlu4KXnO/cHqIkidW+7Y2T0ZJp KxpBsV1au95jllqW4I54pwWizpc7zJSHnB/Q6r4j0nBCszEhxpRxZ6BEpRr/lHuZFaPDg0 69Upfcjdf4ymDxYgnp7iIXNPY9Ou8OjENNAVLyxgPZ05x7DCDEgQOh7HyLQWbw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1783092799; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=eOgPVSfGcdFegj8T3RY7gw5thRm595QqkcT+b9bEncQ=; b=fgvAHomNl16R8SJkz0astYryrb/lELjW2bbhKCERbrivcXOFr4UJwv9YH3vsxW18v0ndTD ZJnb5N8PtAucC9OcdwAlmg/93GSmWT+zOrDcyi1hMJ2kV699vszssxZDUwLqiii8MtvsOY yv3GhMcQ9tv1Gyuflg/H9ixSDUhy6/QSlKQcWKXDmUDXiDCM35nJ6GfKnUBWoVSfEd1x8O wR2Ezp6dZyVvb+O4puZJXp3AFjWEQB1TNXtyw6PXISURxRXyTJu++Mc8SHyMSo/Epst1ZE oW/cqphocrkRE6KQZwEvpMblSGvg9fdueWeEUTk+18fqhp0iAIkGSOoQtgYwUQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4gsHp66H7pzt7t for ; Fri, 03 Jul 2026 15:33:18 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 44d7c by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Fri, 03 Jul 2026 15:33:18 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Olivier Certner Subject: git: 74e43f631b51 - main - hwpstate_intel(4): Use new cpu_get_pcpuid(), constify related variables List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: olce X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 74e43f631b51089e040e40b9887e94c1585203f9 Auto-Submitted: auto-generated Date: Fri, 03 Jul 2026 15:33:18 +0000 Message-Id: <6a47d63e.44d7c.407c3444@gitrepo.freebsd.org> The branch main has been updated by olce: URL: https://cgit.FreeBSD.org/src/commit/?id=74e43f631b51089e040e40b9887e94c1585203f9 commit 74e43f631b51089e040e40b9887e94c1585203f9 Author: Olivier Certner AuthorDate: 2026-06-26 22:41:20 +0000 Commit: Olivier Certner CommitDate: 2026-07-03 15:32:31 +0000 hwpstate_intel(4): Use new cpu_get_pcpuid(), constify related variables Also, add a check in the attach method that a per-CPU structure is provided by the bus. This allows to remove such checks in multiple functions. The check cannot currently fail as all x86 CPU drivers (ACPI, legacy) provide the CPU_IVAR_PCPU instance variable, but it is safer to have it, especially as an example to other driver writers. Event: Halifax Hackathon 202606 Location: Seat 36K in AC667, still waiting for a gate at Montréal-Trudeau Sponsored by: The FreeBSD Foundation --- sys/x86/cpufreq/hwpstate_intel.c | 85 +++++++++++++++------------------------- 1 file changed, 31 insertions(+), 54 deletions(-) diff --git a/sys/x86/cpufreq/hwpstate_intel.c b/sys/x86/cpufreq/hwpstate_intel.c index 2491a7784956..1cea06f3721e 100644 --- a/sys/x86/cpufreq/hwpstate_intel.c +++ b/sys/x86/cpufreq/hwpstate_intel.c @@ -88,13 +88,13 @@ static device_method_t intel_hwpstate_methods[] = { #define RDMSR_ON_CPU(dev, msr, val) \ (x86_msr_op(msr, \ MSR_OP_RENDEZVOUS_ONE | MSR_OP_READ | \ - MSR_OP_CPUID(cpu_get_pcpu(dev)->pc_cpuid), \ + MSR_OP_CPUID(cpu_get_pcpuid(dev)), \ 0, val)); #define WRMSR_ON_CPU(dev, msr, val) \ x86_msr_op(msr, \ MSR_OP_RENDEZVOUS_ONE | MSR_OP_WRITE | \ - MSR_OP_CPUID(cpu_get_pcpu(dev)->pc_cpuid), \ + MSR_OP_CPUID(cpu_get_pcpuid(dev)), \ val, NULL) struct hwp_softc { @@ -146,7 +146,7 @@ hwp_has_error(u_int res, u_int err) struct get_cppc_regs_data { /* Inputs */ - struct hwp_softc *sc; + const struct hwp_softc *sc; /* Outputs */ uint64_t enabled; uint64_t caps; @@ -185,10 +185,11 @@ get_cppc_regs_cb(void *args) } static inline void -get_cppc_regs_one(struct hwp_softc *sc, struct get_cppc_regs_data *req) +get_cppc_regs_one(const struct hwp_softc *const sc, + struct get_cppc_regs_data *const req) { req->sc = sc; - smp_rendezvous_cpu(cpu_get_pcpu(sc->dev)->pc_cpuid, + smp_rendezvous_cpu(cpu_get_pcpuid(sc->dev), smp_no_rendezvous_barrier, get_cppc_regs_cb, smp_no_rendezvous_barrier, req); } @@ -198,29 +199,22 @@ get_cppc_regs_one(struct hwp_softc *sc, struct get_cppc_regs_data *req) static int intel_hwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS) { - device_t dev; - struct pcpu *pc; + const struct hwp_softc *const sc = arg1; + const u_int cpuid = cpu_get_pcpuid(sc->dev); struct sbuf *sb; - struct hwp_softc *sc; struct get_cppc_regs_data data; int ret = 0; - sc = (struct hwp_softc *)arg1; - dev = sc->dev; - - pc = cpu_get_pcpu(dev); - if (pc == NULL) - return (ENXIO); - get_cppc_regs_one(sc, &data); + sb = sbuf_new(NULL, NULL, 1024, SBUF_FIXEDLEN | SBUF_INCLUDENUL); sbuf_putc(sb, '\n'); if (hwp_has_error(data.res, HWP_ERROR_CPPC_ENABLE)) sbuf_printf(sb, "CPU%u: IA32_PM_ENABLE: " MSR_NOT_READ_MSG "\n", - pc->pc_cpuid); + cpuid); else - sbuf_printf(sb, "CPU%d: HWP %sabled\n", pc->pc_cpuid, + sbuf_printf(sb, "CPU%d: HWP %sabled\n", cpuid, ((data.enabled & 1) ? "En" : "Dis")); if (data.enabled == 0) @@ -286,22 +280,15 @@ out: static int sysctl_epp_select(SYSCTL_HANDLER_ARGS) { - struct hwp_softc *sc; - device_t dev; - struct pcpu *pc; + const device_t dev = arg1; + struct hwp_softc *const sc = device_get_softc(dev); uint64_t epb; uint32_t val; int ret; - dev = oidp->oid_arg1; - sc = device_get_softc(dev); if (!sc->hwp_pref_ctrl && !sc->hwp_perf_bias) return (ENODEV); - pc = cpu_get_pcpu(dev); - if (pc == NULL) - return (ENXIO); - if (sc->hwp_pref_ctrl) { val = (sc->req & IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE) >> 24; } else { @@ -513,40 +500,34 @@ set_autonomous_hwp_send_one(struct hwp_softc *sc, } static int -set_autonomous_hwp(struct hwp_softc *sc) +set_autonomous_hwp(struct hwp_softc *const sc) { - struct pcpu *pc; + const device_t dev = sc->dev; + const u_int cpuid = cpu_get_pcpuid(dev); struct set_autonomous_hwp_cb data; - device_t dev; - - dev = sc->dev; - - pc = cpu_get_pcpu(dev); - if (pc == NULL) - return (ENXIO); set_autonomous_hwp_send_one(sc, &data); if (hwp_has_error(data.flag, HWP_ERROR_CPPC_ENABLE)) { device_printf(dev, "Failed to enable HWP for cpu%d (%d)\n", - pc->pc_cpuid, EFAULT); + cpuid, EFAULT); goto out; } if (hwp_has_error(data.flag, HWP_ERROR_CPPC_REQUEST)) { device_printf(dev, "Failed to read HWP request MSR for cpu%d (%d)\n", - pc->pc_cpuid, EFAULT); + cpuid, EFAULT); goto out; } if (hwp_has_error(data.flag, HWP_ERROR_CPPC_CAPS)) { device_printf(dev, "Failed to read HWP capabilities MSR for cpu%d (%d)\n", - pc->pc_cpuid, EFAULT); + cpuid, EFAULT); goto out; } if (hwp_has_error(data.flag, HWP_ERROR_CPPC_REQUEST_WRITE)) { device_printf(dev, "Failed to setup%s autonomous HWP for cpu%d\n", - sc->hwp_pkg_ctrl_en ? " PKG" : "", pc->pc_cpuid); + sc->hwp_pkg_ctrl_en ? " PKG" : "", cpuid); goto out; } if (hwp_has_error(data.flag, HWP_ERROR_CPPC_REQUEST_PKG)) @@ -566,6 +547,11 @@ intel_hwpstate_attach(device_t dev) sc = device_get_softc(dev); sc->dev = dev; + if (cpu_get_pcpu(dev) == NULL) { + device_printf(dev, + "Parent bus does not provide a per-CPU structure!"); + return (ENXIO); + } /* eax */ if (cpu_power_eax & CPUTPM1_HWP_NOTIFICATION) @@ -609,21 +595,16 @@ intel_hwpstate_detach(device_t dev) static int intel_hwpstate_get(device_t dev, struct cf_setting *set) { - struct pcpu *pc; uint64_t rate; int ret; if (set == NULL) return (EINVAL); - pc = cpu_get_pcpu(dev); - if (pc == NULL) - return (ENXIO); - memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set)); set->dev = dev; - ret = cpu_est_clockrate(pc->pc_cpuid, &rate); + ret = cpu_est_clockrate(cpu_get_pcpuid(dev), &rate); if (ret == 0) set->freq = rate / 1000000; @@ -698,7 +679,7 @@ static inline void hwpstate_resume_send_one(struct hwp_softc *sc, struct hwpstate_resume_cb *req) { req->sc = sc; - smp_rendezvous_cpu(cpu_get_pcpu(sc->dev)->pc_cpuid, + smp_rendezvous_cpu(cpu_get_pcpuid(sc->dev), smp_no_rendezvous_barrier, hwpstate_resume_cb, smp_no_rendezvous_barrier, req); } @@ -710,28 +691,24 @@ hwpstate_resume_send_one(struct hwp_softc *sc, struct hwpstate_resume_cb *req) static int intel_hwpstate_resume(device_t dev) { + const u_int cpuid = cpu_get_pcpuid(dev); struct hwp_softc *sc; - struct pcpu *pc; struct hwpstate_resume_cb data; sc = device_get_softc(dev); - pc = cpu_get_pcpu(dev); - if (pc == NULL) - return (ENXIO); - hwpstate_resume_send_one(sc, &data); if (hwp_has_error(data.flag, HWP_ERROR_CPPC_ENABLE)) { device_printf(dev, "Failed to enable HWP for cpu%d after suspend (%d)\n", - pc->pc_cpuid, EFAULT); + cpuid, EFAULT); goto out; } if (hwp_has_error(data.flag, HWP_ERROR_CPPC_REQUEST_WRITE)) { device_printf(dev, "Failed to set%s autonomous HWP for cpu%d after suspend\n", - sc->hwp_pkg_ctrl_en ? " PKG" : "", pc->pc_cpuid); + sc->hwp_pkg_ctrl_en ? " PKG" : "", cpuid); goto out; } if (hwp_has_error(data.flag, HWP_ERROR_CPPC_REQUEST_PKG)) { @@ -744,7 +721,7 @@ intel_hwpstate_resume(device_t dev) device_printf(dev, "Failed to set energy perf bias for cpu%d after " "suspend\n", - pc->pc_cpuid); + cpuid); } out: