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From: Alexander Motin <mav@FreeBSD.org>
Date: Thu, 26 Nov 2009 14:56:58 +0000 (UTC)
To: cvs-src-old@freebsd.org
X-FreeBSD-CVS-Branch: RELENG_8
Subject: cvs commit: src/sys/dev/ata/chipsets ata-intel.c
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mav         2009-11-26 14:56:58 UTC

  FreeBSD src repository

  Modified files:        (Branch: RELENG_8)
    sys/dev/ata/chipsets ata-intel.c 
  Log:
  SVN rev 199833 on 2009-11-26 14:56:58Z by mav
  
  MFC r199645, r199646:
  Fix Intel PATA UDMA timings setting, affecting write performance.
  Binary divider value 10 specified in datasheet is not a hex 0x10.
  UDMA2 should be 33/2 instead of 66/4, which is documented as reverved,
  UDMA4 should be 66/2 instead of 66/4, which is definitely wrong.
  Release over-agressive WDMA0 mode timings as close to spec as chip can.
  
  Revision  Changes    Path
  1.7.2.4   +3 -3      src/sys/dev/ata/chipsets/ata-intel.c