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From: Pyun YongHyeon <yongari@FreeBSD.org>
Date: Tue, 31 Mar 2009 03:29:05 +0000 (UTC)
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Subject: svn commit: r190587 - head/sys/dev/re
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Author: yongari
Date: Tue Mar 31 03:29:05 2009
New Revision: 190587
URL: http://svn.freebsd.org/changeset/base/190587

Log:
  Partial revert r185756.
  It seems that RTL8168D and RTL8102EL requires additional settle
  time to complete RL_PHYAR register write. Accessing RL_PHYAR
  register right after the write causes errors for subsequent PHY
  register accesses.
  
  Tested by:	george at luckytele dot com,
  		Steve Wills < STEVE at stevenwills dot com >

Modified:
  head/sys/dev/re/if_re.c

Modified: head/sys/dev/re/if_re.c
==============================================================================
--- head/sys/dev/re/if_re.c	Tue Mar 31 02:50:41 2009	(r190586)
+++ head/sys/dev/re/if_re.c	Tue Mar 31 03:29:05 2009	(r190587)
@@ -419,6 +419,7 @@ re_gmii_readreg(device_t dev, int phy, i
 	}
 
 	CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
+	DELAY(1000);
 
 	for (i = 0; i < RL_PHY_TIMEOUT; i++) {
 		rval = CSR_READ_4(sc, RL_PHYAR);
@@ -446,6 +447,7 @@ re_gmii_writereg(device_t dev, int phy, 
 
 	CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
 	    (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY);
+	DELAY(1000);
 
 	for (i = 0; i < RL_PHY_TIMEOUT; i++) {
 		rval = CSR_READ_4(sc, RL_PHYAR);