From owner-freebsd-stable@FreeBSD.ORG Fri Mar 30 22:52:01 2012 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 24151106566B for ; Fri, 30 Mar 2012 22:52:01 +0000 (UTC) (envelope-from janm@transactionware.com) Received: from midgard.transactionware.com (mail2.transactionware.com [203.14.245.36]) by mx1.freebsd.org (Postfix) with SMTP id 6603F8FC17 for ; Fri, 30 Mar 2012 22:51:59 +0000 (UTC) Received: (qmail 78919 invoked by uid 907); 30 Mar 2012 22:51:58 -0000 Received: from eth222.nsw.adsl.internode.on.net (HELO [192.168.1.100]) (150.101.196.221) (smtp-auth username janm, mechanism plain) by midgard.transactionware.com (qpsmtpd/0.84) with (AES128-SHA encrypted) ESMTPSA; Sat, 31 Mar 2012 09:51:58 +1100 Mime-Version: 1.0 (Apple Message framework v1257) Content-Type: text/plain; charset=us-ascii From: Jan Mikkelsen In-Reply-To: <201203302221.q2UML7O2055021@ambrisko.com> Date: Sat, 31 Mar 2012 09:52:21 +1100 Content-Transfer-Encoding: quoted-printable Message-Id: <2A241FF0-6CB6-430B-877A-46E7982F7149@transactionware.com> References: <201203302221.q2UML7O2055021@ambrisko.com> To: Doug Ambrisko X-Mailer: Apple Mail (2.1257) Cc: freebsd-stable@freebsd.org, John Baldwin Subject: Re: LSI MegaRAID SAS 9240 with mfi driver? X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Mar 2012 22:52:01 -0000 On 31/03/2012, at 9:21 AM, Doug Ambrisko wrote: > Jan Mikkelsen writes: > | I don't know what changes Sean did. Are they in 9.0-release, or do I=20= > | need -stable after a certain point? I'm assuming I should be able to=20= > | take src/sys/dev/mfi/... and src/usr.sbin/mfiutil/... from -current. >=20 > It's in the SVN project/head_mfi repro. You can browse it via the web = at: > http://svnweb.freebsd.org/base/projects/head_mfi/ >=20 > It's not in -current yet. I'm working on the. I just did all the > merges to a look try and eye'd them over. Now doing a compile test > then I can check it into -current. OK, will check it out. > | The performance is an interesting thing. The write performance I = care=20 > | about is ZFS raidz2 with 6 x JBOD disks (or 6 x single disk raid0) = on=20 > | this controller. The 9261 with a BBU performs well but obviously = costs more. >=20 > There will need to be clarification in the future. JBOD is not that > same as a single disk RAID. If I remember correctly, when doing some > JBOD testing version single disk RAID is that JBOD is slower. A=20 > single disk RAID is faster since it can use the RAID. However, = without > the battery then you risk losing data on power outage etc. Without = the > battery then performance of a JBOD and single disk RAID should be able > the same. >=20 > A real JBOD as shown by LSI's firmware etc. shows up as a = /dev/mfisyspd > entries. JBOD by LSI is a newer thing. Ok, interesting. I was told by the distributor that the 9240 supports = JBOD mode, but the 9261 doesn't. I'm interested to test it out with ZFS. >=20 > | I can see the BBU being important for controller based raid5, but = I'm=20 > | hoping that ZFS with JBOD will still perform well. I'm ignorant at = this=20 > | point, so that's why I'm trying it out. Do you have any experience = or=20 > | expectations with a 9240 being used in a setup like that? >=20 > The battery or NVRAM doesn't matter on the RAID type being used since = the > cache in NVRAM mode, says done whenever it has space in the cache for = the > write. Eventually, it will hit the disk. Without the cache working = in > this mode the write can't be acknowledged until the disk says done. = So > performance suffers. With a single disk RAID you have been using the > cache. With RAID-5 it is important because a single update requires two writes = and a failure in the window where one write has completed and one write = has not could cause data corruption. I don't know whether the controller = really handles this case. I guess I'm hopeful that ZFS will perform the function performed by the = NVRAM on the controller. I can see how the controller in isolation is = clearly slower without a BBU because it has to expose the higher layers = to the disk latency. > Now you can force using the cache without NVRAM but you have to = acknowledge > the risk of that. Yes, I understand the risk, and it is one I do not want to take. All the = 9261s I have deployed have a BBU and go into write through mode if the = battery has a problem. I think I need to test it in the context of ZFS and see how it works = without controller NVRAM. Regards, Jan.