From owner-svn-src-head@freebsd.org Sat Oct 6 03:20:27 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7D93010C2531; Sat, 6 Oct 2018 03:20:27 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 340AB7D901; Sat, 6 Oct 2018 03:20:27 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 1597D1EBB8; Sat, 6 Oct 2018 03:20:27 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w963KQd3005342; Sat, 6 Oct 2018 03:20:26 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w963KQD1005341; Sat, 6 Oct 2018 03:20:26 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201810060320.w963KQD1005341@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Sat, 6 Oct 2018 03:20:26 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r339212 - head/sys/powerpc/powernv X-SVN-Group: head X-SVN-Commit-Author: jhibbits X-SVN-Commit-Paths: head/sys/powerpc/powernv X-SVN-Commit-Revision: 339212 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Oct 2018 03:20:27 -0000 Author: jhibbits Date: Sat Oct 6 03:20:26 2018 New Revision: 339212 URL: https://svnweb.freebsd.org/changeset/base/339212 Log: powerpc64/powernv: Don't mask MSIs in OPAL Summary: Discussing with Benjamin Herrenschmidt, MSIs, and edge-triggered interrupts in general, must not be masked in XICS and XIVE, else subsequent interrupts may be ignored. Testing locally on my Talos II (single CPU, 18-core POWER9), NVMe now works with MSI, improving read throughput by ~70% (900MB/s -> 1.67GB/s, with 64MB block size) over INTx interrupts, and snd_hda(4) now will actually play music with MSI. Previously, snd_hda(4) would not receive interrupts, timing out, and declaring the channels dead. This has also been tested by Kevin Bowling, and others, with great success. Kevin reported NVMe unusable on his Talos II prior to this patch. Reviewed by: nwhitehorn, kbowling Approved by: re(rgrimes) Differential Revision: https://reviews.freebsd.org/D17356 Modified: head/sys/powerpc/powernv/opal_pci.c Modified: head/sys/powerpc/powernv/opal_pci.c ============================================================================== --- head/sys/powerpc/powernv/opal_pci.c Sat Oct 6 02:10:32 2018 (r339211) +++ head/sys/powerpc/powernv/opal_pci.c Sat Oct 6 03:20:26 2018 (r339212) @@ -95,8 +95,6 @@ static int opalpci_route_interrupt(device_t bus, devic */ static void opalpic_pic_enable(device_t dev, u_int irq, u_int vector); static void opalpic_pic_eoi(device_t dev, u_int irq); -static void opalpic_pic_mask(device_t dev, u_int irq); -static void opalpic_pic_unmask(device_t dev, u_int irq); /* * Commands @@ -143,8 +141,6 @@ static device_method_t opalpci_methods[] = { /* PIC interface for MSIs */ DEVMETHOD(pic_enable, opalpic_pic_enable), DEVMETHOD(pic_eoi, opalpic_pic_eoi), - DEVMETHOD(pic_mask, opalpic_pic_mask), - DEVMETHOD(pic_unmask, opalpic_pic_unmask), DEVMETHOD_END }; @@ -650,7 +646,10 @@ opalpci_map_msi(device_t dev, device_t child, int irq, static void opalpic_pic_enable(device_t dev, u_int irq, u_int vector) { + struct opalpci_softc *sc = device_get_softc(dev); + PIC_ENABLE(root_pic, irq, vector); + opal_call(OPAL_PCI_MSI_EOI, sc->phb_id, irq); } static void opalpic_pic_eoi(device_t dev, u_int irq) @@ -662,21 +661,3 @@ static void opalpic_pic_eoi(device_t dev, u_int irq) PIC_EOI(root_pic, irq); } - -static void opalpic_pic_mask(device_t dev, u_int irq) -{ - PIC_MASK(root_pic, irq); -} - -static void opalpic_pic_unmask(device_t dev, u_int irq) -{ - struct opalpci_softc *sc; - - sc = device_get_softc(dev); - - PIC_UNMASK(root_pic, irq); - - opal_call(OPAL_PCI_MSI_EOI, sc->phb_id, irq); -} - -