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Date:      Thu, 16 Jun 2005 19:41:18 GMT
From:      John Baldwin <jhb@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 78646 for review
Message-ID:  <200506161941.j5GJfIus045843@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=78646

Change 78646 by jhb@jhb_slimer on 2005/06/16 19:41:15

	The current method of turning the local APIC off and then back on is
	confirmed to work ok, so remove this alternative fix that left the
	APIC on but registered a handler for the spurious APIC interrupts
	that can be triggered by the Errata in question.

Affected files ...

.. //depot/projects/smpng/sys/i386/i386/apic_vector.s#14 edit
.. //depot/projects/smpng/sys/i386/i386/exception.s#23 edit
.. //depot/projects/smpng/sys/i386/i386/initcpu.c#24 edit
.. //depot/projects/smpng/sys/i386/i386/local_apic.c#30 edit
.. //depot/projects/smpng/sys/i386/i386/machdep.c#94 edit

Differences ...

==== //depot/projects/smpng/sys/i386/i386/apic_vector.s#14 (text+ko) ====

@@ -107,8 +107,6 @@
 
 	iret
 
-#ifdef DEV_APIC
-
 	ISR_VEC(1, apic_isr1)
 	ISR_VEC(2, apic_isr2)
 	ISR_VEC(3, apic_isr3)
@@ -383,4 +381,3 @@
 	POP_FRAME
 	iret
 #endif /* SMP */
-#endif /* DEV_APIC */

==== //depot/projects/smpng/sys/i386/i386/exception.s#23 (text+ko) ====

@@ -234,12 +234,14 @@
 
 #include <i386/isa/atpic_vector.s>
 
+#ifdef DEV_APIC
 	.data
 	.p2align 4
 	.text
 	SUPERALIGN_TEXT
 
 #include <i386/i386/apic_vector.s>
+#endif
 
 	.data
 	.p2align 4

==== //depot/projects/smpng/sys/i386/i386/initcpu.c#24 (text+ko) ====

@@ -68,6 +68,7 @@
 
 #ifdef I686_CPU
 static void	init_6x86MX(void);
+static void	init_ppro(void);
 static void	init_mendocino(void);
 #endif
 
@@ -471,6 +472,19 @@
 	write_eflags(eflags);
 }
 
+static void
+init_ppro(void)
+{
+	u_int64_t	apicbase;
+
+	/*
+	 * Local APIC should be disabled if it is not going to be used.
+	 */
+	apicbase = rdmsr(MSR_APICBASE);
+	apicbase &= ~APICBASE_ENABLED;
+	wrmsr(MSR_APICBASE, apicbase);
+}
+
 /*
  * Initialize BBL_CR_CTL3 (Control register 3: used to configure the
  * L2 cache).
@@ -561,6 +575,9 @@
 	case CPU_686:
 		if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
 			switch (cpu_id & 0xff0) {
+			case 0x610:
+				init_ppro();
+				break;
 			case 0x660:
 				init_mendocino();
 				break;

==== //depot/projects/smpng/sys/i386/i386/local_apic.c#30 (text+ko) ====

@@ -747,6 +747,7 @@
 apic_init(void *dummy __unused)
 {
 	struct apic_enumerator *enumerator;
+	uint64_t apic_base;
 	int retval, best;
 
 	/* We only support built in local APICs. */
@@ -779,6 +780,18 @@
 		printf("APIC: Using the %s enumerator.\n",
 		    best_enum->apic_name);
 
+	/*
+	 * To work around an errata, we disable the local APIC on some
+	 * CPUs during early startup.  We need to turn the local APIC back
+	 * on on such CPUs now.
+	 */
+	if (cpu == CPU_686 && strcmp(cpu_vendor, "GenuineIntel") == 0 &&
+	    (cpu_id & 0xff0) == 0x610) {
+		apic_base = rdmsr(MSR_APICBASE);
+		apic_base |= APICBASE_ENABLED;
+		wrmsr(MSR_APICBASE, apic_base);
+	}
+
 	/* Second, probe the CPU's in the system. */
 	retval = best_enum->apic_probe_cpus();
 	if (retval != 0)

==== //depot/projects/smpng/sys/i386/i386/machdep.c#94 (text+ko) ====

@@ -112,7 +112,6 @@
 #include <machine/cpu.h>
 #include <machine/cputypes.h>
 #include <machine/intr_machdep.h>
-#include <machine/apicvar.h>
 #include <machine/md_var.h>
 #include <machine/pc/bios.h>
 #include <machine/pcb.h>
@@ -2141,13 +2140,6 @@
  	setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
 	    GSEL(GCODE_SEL, SEL_KPL));
 
-	/*
-	 * Workaround for PentiumPro Errata 5AP: Spurious interrupts routed
-	 * to int15 in APIC virtual wire mode.
-	 */
-	setidt(15, &IDTVEC(spuriousint),  SDT_SYS386IGT, SEL_KPL,
-	    GSEL(GCODE_SEL, SEL_KPL));
-
 	r_idt.rd_limit = sizeof(idt0) - 1;
 	r_idt.rd_base = (int) idt;
 	lidt(&r_idt);



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