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From: Marcel Moolenaar <marcel@FreeBSD.org>
Date: Tue, 12 Aug 2003 19:49:50 -0700 (PDT)
To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org,
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Subject: cvs commit: src/sys/ia64/ia64 syscall.S
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marcel      2003/08/12 19:49:50 PDT

  FreeBSD src repository

  Modified files:
    sys/ia64/ia64        syscall.S 
  Log:
  Put an instruction group break between the move to ar.rnat and the
  move to ar.rsc. The RSE must be in enforced lazy mode when writing
  to RSE modifyable registers. In this case we restore the RSE NaT
  collection register ar.rnat. I have seen 2 general exception faults
  on pluto1 now that indicate that the move to ar.rsc has already
  happened prior to the move to ar.rnat, meaning that the RSE is not
  in enforced lazy mode anymore. The ia64 dependency and instruction
  ordering rules seem to allow having both registers written to in
  the same instruction group, provided ar.rsc is written to later than
  ar.rnat (based on the ordering semantics). It appears that we may
  be pushing our luck. For now, put them in seperate cycles (by means
  of the instruction group break). If we ever get a general exception
  fault on the move to ar.rnat again, we have definite proof that
  something else is fishy.
  
  Revision  Changes    Path
  1.7       +1 -0      src/sys/ia64/ia64/syscall.S