From owner-cvs-src-old@FreeBSD.ORG Thu Nov 26 15:11:29 2009 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 203E210656AA for ; Thu, 26 Nov 2009 15:11:29 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 79B518FC1E for ; Thu, 26 Nov 2009 15:11:28 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id nAQFBSIP079797 for ; Thu, 26 Nov 2009 15:11:28 GMT (envelope-from mav@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id nAQFBSHF079796 for cvs-src-old@freebsd.org; Thu, 26 Nov 2009 15:11:28 GMT (envelope-from mav@repoman.freebsd.org) Message-Id: <200911261511.nAQFBSHF079796@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to mav@repoman.freebsd.org using -f From: Alexander Motin Date: Thu, 26 Nov 2009 15:11:19 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: RELENG_8 Subject: cvs commit: src/sys/i386/cpufreq est.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Nov 2009 15:11:29 -0000 mav 2009-11-26 15:11:19 UTC FreeBSD src repository Modified files: (Branch: RELENG_8) sys/i386/cpufreq est.c Log: SVN rev 199834 on 2009-11-26 15:11:19Z by mav MFC r199268, r199269, r199273: Core2Duo/Core2Quad CPUs are unable to control frequency of single CPU core, only pair of them. As result, both cores are running on highest one of requested frequencies, and that is reported by status register. Such behavior confuses frequency validation logic, as it runs on only one core, as SMP is not yet launched, making EIST completely unusable. Disable frequency validation by default, for systems with more then one CPU, until we can implement it properly. It looks like making more harm now then benefits. Add 'hw.est.strict' loader tunable to control it. PR: amd64/140506 Revision Changes Path 1.24.2.2 +16 -7 src/sys/i386/cpufreq/est.c