From owner-freebsd-current  Fri Apr  2 10:42:15 1999
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Date: Fri, 2 Apr 1999 12:41:53 -0600
From: Alan Cox <alc@cs.rice.edu>
To: current@freebsd.org
Cc: luoqi@freebsd.org
Subject: SMP users (important)
Message-ID: <19990402124153.H14114@nonpc.cs.rice.edu>
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I've committed the basic infrastructure to improve TLB management
on SMPs.  Translation: this will lead to the elimination of a LOT
of interprocessor interrupts to invalidate TLB entries.  I'll be
"turning on" the new mechanisms slowly so we can carefully debug
each step and (hopefully) avoid any problems.

Now, if you're not using Luoqi's patches to enable multithreaded
address spaces, you can stop reading here.  If you are, you'll
need to patch i386/i386/swtch.s as follows:

Index: i386/i386/swtch.s
===================================================================
RCS file: /home/ncvs/src/sys/i386/i386/swtch.s,v
retrieving revision 1.78
diff -c -r1.78 swtch.s
*** swtch.s     1999/04/02 17:59:39     1.78
--- swtch.s     1999/04/02 18:37:29
***************
*** 466,472 ****
  #else
        xorl    %eax, %eax
  #endif /* SMP */
!       btrl    %eax, VM_PMAP+PM_ACTIVE(%edx)
  
        movl    P_ADDR(%ecx),%edx
  
--- 466,473 ----
  #else
        xorl    %eax, %eax
  #endif /* SMP */
!       movl    VM_PMAP(%edx), %edx
!       btrl    %eax, PM_ACTIVE(%edx)
  
        movl    P_ADDR(%ecx),%edx
  
***************
*** 690,696 ****
  #else
        xorl    %eax, %eax
  #endif
!       btsl    %eax, VM_PMAP+PM_ACTIVE(%ebx)
  
        /* restore context */
        movl    PCB_EBX(%edx),%ebx
--- 691,698 ----
  #else
        xorl    %eax, %eax
  #endif
!       movl    VM_PMAP(%ebx), %ebx
!       btsl    %eax, PM_ACTIVE(%ebx)
  
        /* restore context */
        movl    PCB_EBX(%edx),%ebx



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