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Date: Thu, 26 Sep 1996 20:17:55 +0200 (MET DST)
Message-Id: <199609261817.UAA08042@x14.mi.uni-koeln.de>
From: Stefan Esser <se@zpr.uni-koeln.de>
To: "Mike Durian" <durian@plutotech.com>
Cc: Stefan Esser <se@zpr.uni-koeln.de>, Bruce Evans <bde@zeta.org.au>,
        freebsd-hackers@freebsd.org
Subject: Re: Special Cycles on the PCI bus 
In-Reply-To: <199609251920.NAA22022@pluto.plutotech.com>
References: <199609251920.NAA22022@pluto.plutotech.com>
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Mike Durian writes:
 > On Wed, 25 Sep 1996 20:06:25 +0200, Stefan Esser <se@zpr.uni-koeln.de> wrote:
 > >
 > >Well, but those are only used for config space accesses,
 > >and config space is normally not touched at all, after 
 > >the PCI probe and attach are complete.
 > 
 >   I tracked down those accesses to 0xfca0.  They are completely
 > normal.  That is just where the ahc's I/O space got mapped.
 > The accesses were caused by the code in aic7xxx.c:ahc_scsi_cmd().

Ok, but that does not explain, why there are special cycles
being generated. Could you please send information about your
chip set (for example a boot message log) ?

The PCI configuration space accesses are implemented by either
of two methods (and possibly by both simultanously):

Configuration mechanism 1)

	Write address to reg1
	Read/write data to/from reg2 which is mapped to conf_reg

Configuration mechanism 2)

	Write enable key to reg1
	Read/write port in the c000/ffff range for conf_reg access

Special cycles are generated if certain values are written to
what I called "reg 1" above, and it is possible that the BIOS
left the chip set in a state, where port accesses are forwarded
to the bus, but also make the chip set generate special cycles.

And to understand this, I'd like to know your chip set ...

Regards, STefan