From owner-freebsd-arm@FreeBSD.ORG Fri Mar 1 08:57:20 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 7E7CBF52 for ; Fri, 1 Mar 2013 08:57:20 +0000 (UTC) (envelope-from aoyama@peach.ne.jp) Received: from moon.peach.ne.jp (moon.peach.ne.jp [203.141.148.98]) by mx1.freebsd.org (Postfix) with ESMTP id B4C6C124 for ; Fri, 1 Mar 2013 08:57:19 +0000 (UTC) Received: from moon.peach.ne.jp (localhost [127.0.0.1]) by moon.peach.ne.jp (Postfix) with ESMTP id 5576939E09; Fri, 1 Mar 2013 17:57:10 +0900 (JST) Received: from artemis (unknown [172.18.0.20]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by moon.peach.ne.jp (Postfix) with ESMTPSA id 4012839D62; Fri, 1 Mar 2013 17:57:10 +0900 (JST) Message-ID: <2D2EAE5B346840A49A5D99A9BFD1DA1D@ad.peach.ne.jp> From: "Daisuke Aoyama" To: "Oleksandr Tymoshenko" References: <2659960079254C38ACD2F1DCBB7A1A19@ad.peach.ne.jp> <512FD3E8.4000307@bluezbox.com> In-Reply-To: <512FD3E8.4000307@bluezbox.com> Subject: Re: FreeBSD/armv6z/clang on Raspberry Pi 512MB (with U-Boot + ubldr) Date: Fri, 1 Mar 2013 17:57:12 +0900 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=response Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal Importance: Normal X-Mailer: Microsoft Windows Live Mail 14.0.8117.416 X-MimeOLE: Produced By Microsoft MimeOLE V14.0.8117.416 X-Virus-Scanned: ClamAV using ClamSMTP Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Mar 2013 08:57:20 -0000 > I'd like to thank you again for your outstanding work. > I've just committed three patches based on your code: > > - Platform DMA support for SDHCI > - DMA engine driver > - DMA support for BCM2835 SDHCI driver Thank you. I checked the code and found some bug. I don't check why bus_dma and bus_space is slow. But using generic code is good. ---------------------------------------------------------------------- o INFO_WAIT_RESP is cleared when reset. o dreq is overwritten by next call. o should reset DMA when error. quick fix is like this: --- bcm2835_dma.c (revision 247518) +++ bcm2835_dma.c (working copy) @@ -199,6 +199,7 @@ /* Reset control block */ cb = sc->sc_dma_ch[ch].cb; bzero(cb, sizeof(cb)); + cb->info = INFO_WAIT_RESP; /* XXX */ } static int @@ -409,8 +410,10 @@ return (-1); info = sc->sc_dma_ch[ch].cb->info; - info &= ~INFO_PERMAP_MASK; - info |= (dreq << INFO_PERMAP_SHIFT) & INFO_PERMAP_MASK; + if (dreq) { + info &= ~INFO_PERMAP_MASK; + info |= (dreq << INFO_PERMAP_SHIFT) & INFO_PERMAP_MASK; + } if (dreq) info |= INFO_S_DREQ; @@ -459,8 +462,10 @@ return (-1); info = sc->sc_dma_ch[ch].cb->info; - info &= ~INFO_PERMAP_MASK; - info |= (dreq << INFO_PERMAP_SHIFT) & INFO_PERMAP_MASK; + if (dreq) { + info &= ~INFO_PERMAP_MASK; + info |= (dreq << INFO_PERMAP_SHIFT) & INFO_PERMAP_MASK; + } if (dreq) info |= INFO_D_DREQ; @@ -615,6 +693,7 @@ debug & DEBUG_ERROR_MASK, ch->ch); bus_write_4(sc->sc_mem, BCM_DMA_DEBUG(ch->ch), debug & DEBUG_ERROR_MASK); + bcm_dma_reset(sc->sc_dev, ch->ch); } if (cs & CS_INT) { ---------------------------------------------------------------------- -- Daisuke Aoyama