Date: Wed, 25 Apr 2007 18:10:44 +0000 (UTC) From: Stephan Uphoff <ups@FreeBSD.org> To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/amd64/amd64 pmap.c src/sys/i386/i386 pmap.c Message-ID: <200704251810.l3PIAiew024051@repoman.freebsd.org>
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ups 2007-04-25 18:10:44 UTC
FreeBSD src repository
Modified files:
sys/amd64/amd64 pmap.c
sys/i386/i386 pmap.c
Log:
Forced commit to add more comment to:
1.583 src/sys/amd64/amd64/pmap.c
1.588 src/sys/i386/i386/pmap.c
Invalidate all TLBs and page structure caches that may reference a page
for page walk acceleration before releasing it to the free list.
This is required for CPUs implementing page structure caches as described
in the Intel application note:
"TLBs, Paging-Structure Caches, and Their Invalidation"
(Document Number: 317080-001)
Reviewed by: Siddha Suresh (Intel), alc@, peter@
Revision Changes Path
1.584 +0 -0 src/sys/amd64/amd64/pmap.c
1.589 +0 -0 src/sys/i386/i386/pmap.c
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