Date: Mon, 25 Oct 1999 19:14:44 -0700 (PDT) From: "Rodney W. Grimes" <freebsd@gndrsh.dnsmgr.net> To: tlambert@primenet.com (Terry Lambert) Cc: twinkle.star@263.net, freebsd-smp@FreeBSD.ORG Subject: Re: inquire(second time) Message-ID: <199910260214.TAA19260@gndrsh.dnsmgr.net> In-Reply-To: <199910252355.QAA16485@usr06.primenet.com> from Terry Lambert at "Oct 25, 1999 11:55:06 pm"
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> > The need to exclusively access the I/O bus is one of the main > factors sited for the developing RAMBus technology coming from > major vendors. You had better go sit in the corner and think about that real real real hard. RAMBus technology in no way effects exclusive access to the I/O bus. That is purely in the domain of the CPU / IO bridge chip, and no place near the CPU / Memory controller bridge chip. The main factor driving RAMBus and other fast memory technologies is the fact that our CPU cores are now running in production at 2 to 4 times the data rate of the fastest memory system designs in production. And thats for a single CPU design. The problem of CPU demand vs memory bandwidth is only aggrevated, and thusly requireing a faster memory subsystem, by SMP. -- Rod Grimes - KD7CAX @ CN85sl - (RWG25) rgrimes@gndrsh.dnsmgr.net Design Engineer, HAWK/32, aka MIL MV8000, etc seq memory systems To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
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