From owner-freebsd-hackers Thu Nov 28 4:47:56 2002 Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 49DF737B401 for ; Thu, 28 Nov 2002 04:47:55 -0800 (PST) Received: from foem.leiden.webweaving.org (fia224-72.dsl.hccnet.nl [62.251.72.224]) by mx1.FreeBSD.org (Postfix) with ESMTP id 71B4E43EAF for ; Thu, 28 Nov 2002 04:47:49 -0800 (PST) (envelope-from dirkx@webweaving.org) Received: from foem (foem [10.11.0.2]) by foem.leiden.webweaving.org (8.12.6/8.12.6) with ESMTP id gASClV64014484 (version=TLSv1/SSLv3 cipher=EDH-RSA-DES-CBC3-SHA bits=168 verify=NO); Thu, 28 Nov 2002 13:47:32 +0100 (CET) (envelope-from dirkx@webweaving.org) Date: Thu, 28 Nov 2002 13:47:31 +0100 (CET) From: Dirk-Willem van Gulik X-X-Sender: dirkx@foem.leiden.webweaving.org To: "M. Warner Losh" Cc: freebsd-hackers@FreeBSD.ORG Subject: Re: Understanding PCI intr routing on a Cirrus Logic PD6729 In-Reply-To: <20021127.100323.111035160.imp@bsdimp.com> Message-ID: <20021128133803.N2484-100000@foem.leiden.webweaving.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-freebsd-hackers@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG On Wed, 27 Nov 2002, M. Warner Losh wrote: > Well, right now the following code is trying to force INTA#: .. > sp->putb(sp, PCIC_INT_GEN, /* Assume INTA# */ > (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | 3); Which seems to cause the hang. Commenting this out will resort in the 'normal' timeout problem. Now as I understand it; the wiring on the board simply maps all outogoing INT pins A-D and the ISA pins to the same INTA# on the PCI bus. This seems a bit suspect to me; as INTA-D are active low/open drain type (or should be) and the ISA pin's are/should be of the active high ISA variety. Which seems mutually exclusive to me ? So can they be cross connected and yet still allow us to program the PCIC_INT_GEN register so that an IRQ gets through ? Secontly - So without the above being set; only the management IRQ for the PCIC actions gets through ? And not that of the card in the pcmcia slot. Once the PCIC is correctly programmed - both will come through through the same INTA pin (which is mapped to irq 9, 10 or 11) - where is the routing done to make sure that both the pcic driver and the relevant pcmcia driver sees the IRQ; or can one of the two accidentally 'claim' the pin and not pass on to the other ? Where is this done ? > This doesn't force the interrupt to be IRQ3, but rather tells the card > to use INTA#. The probe line for wi card should say irq N where N is > the same as the bridge's irq. Ack - it does. Dw. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message