From owner-freebsd-arm@FreeBSD.ORG Sat Feb 14 11:03:13 2015 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 29A7C57C for ; Sat, 14 Feb 2015 11:03:13 +0000 (UTC) Received: from phabric-backend.isc.freebsd.org (phabric-backend.isc.freebsd.org [IPv6:2001:4f8:3:ffe0:406a:0:50:2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 084F9194 for ; Sat, 14 Feb 2015 11:03:13 +0000 (UTC) Received: from phabric-backend.isc.freebsd.org (phabric-backend.isc.freebsd.org [127.0.1.5]) by phabric-backend.isc.freebsd.org (8.14.9/8.14.9) with ESMTP id t1EB3C3g094743 for ; Sat, 14 Feb 2015 11:03:12 GMT (envelope-from root@phabric-backend.isc.freebsd.org) Received: (from root@localhost) by phabric-backend.isc.freebsd.org (8.14.9/8.14.9/Submit) id t1EB3Cew094742; Sat, 14 Feb 2015 11:03:12 GMT (envelope-from root) Date: Sat, 14 Feb 2015 11:03:12 +0000 To: freebsd-arm@freebsd.org From: "andrew (Andrew Turner)" Subject: [Differential] [Changed Subscribers] D1833: Add memory barriers to buf_ring Message-ID: X-Priority: 3 Thread-Topic: D1833: Add memory barriers to buf_ring X-Herald-Rules: none X-Phabricator-To: X-Phabricator-To: X-Phabricator-To: X-Phabricator-To: X-Phabricator-Cc: X-Phabricator-Cc: X-Phabricator-Cc: X-Phabricator-Cc: In-Reply-To: References: Thread-Index: OGRiNDkxY2NmMjRiNTc0MjQ4YTYwNWVkNzIyIFTfK3A= X-Phabricator-Sent-This-Message: Yes X-Mail-Transport-Agent: MetaMTA X-Auto-Response-Suppress: All X-Phabricator-Mail-Tags: , MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 14 Feb 2015 11:03:13 -0000 andrew added a subscriber: andrew. INLINE COMMENTS sys/sys/buf_ring.h:107 atomic_store_rel_int includes a dmb before writing to &br->br_prod_tail. I don't think this code will be hitting ARM errata 761319 [1] as the read is in a loop where we exit when we see the new value at least once meaning it has been incremented to the value we expect. . [1] http://infocenter.arm.com/help/topic/com.arm.doc.uan0004a/UAN0004A_a9_read_read.pdf sys/sys/buf_ring.h:167 It feels like one or both of these should be read with atomic_load_acq_int. REVISION DETAIL https://reviews.freebsd.org/D1833 To: zbb, kmacy, imp, rpaulo Cc: andrew, ian, adrian, freebsd-arm