Date: Tue, 7 Jul 2009 15:50:28 +0200 From: Piotr =?iso-8859-2?q?Zi=EAcik?= <kosmo@semihalf.com> To: Hans Petter Selasky <hselasky@c2i.net> Cc: freebsd-arm@freebsd.org, thompsa@freebsd.org, freebsd-usb@freebsd.org Subject: Re: CPU Cache and busdma usage in USB Message-ID: <200907071550.28781.kosmo@semihalf.com> In-Reply-To: <200907051236.22783.hselasky@c2i.net> References: <200906231035.43096.kosmo@semihalf.com> <200906301128.26046.hselasky@c2i.net> <200907051236.22783.hselasky@c2i.net>
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>
> I did not find time yet to test on my AT91RM9200 board. I hope to do a te=
st
> this week. Did you at semihalf find anything?
>
I had Checked USB behaviour on PowerPC without hardware cache coherency.
The problem also exists here and patch helps.
I also generated some logs which you asked for:
=2D--- Original USB code -----
ugen0.1: <Marvell> at usbus0
uhub0: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
ugen1.1: <Marvell> at usbus1
uhub1: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus1
ugen2.1: <Marvell> at usbus2
uhub2: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus2
Root mount waiting for: usbus2 usbus1 usbus0
uhub0: 1 port with 1 removable, self powered
uhub1: 1 port with 1 removable, self powered
uhub2: 1 port with 1 removable, self powered
=3D> bus_dmamap_sync(0xC3A9E780, 0xC3B6F540, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B9E168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E500, 0xC3AB8C40, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B9D168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E500, 0xC3AB8C00, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9D170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E500, 0xC3AB8C00, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9D170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9C170 (size: 0x00000012)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9C170 (size: 0x00000012)
=3D> bus_dmamap_sync(0xC3A9E080, 0xC3B6F400, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B9B168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E080, 0xC3B6F280, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9B170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E080, 0xC3B6F280, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9B170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E080, 0xC3B6F400, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B9B168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E080, 0xC3B6F280, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9B170 (size: 0x00000009)
=3D> bus_dmamap_sync(0xC3A9E080, 0xC3B6F280, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B9B170 (size: 0x00000009)
Root mount waiting for: usbus0
=3D> bus_dmamap_sync(0xC3A9E300, 0xC3AB8D00, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B9A168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E580, 0xC3AB8E40, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B99168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E580, 0xC3B6F380, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B99170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E580, 0xC3B6F380, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B99170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E800, 0xC3B6F480, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B98168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E800, 0xC3AB8E00, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B98170 (size: 0x00000012)
=3D> bus_dmamap_sync(0xC3A9E800, 0xC3AB8E00, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B98170 (size: 0x00000012)
=3D> bus_dmamap_sync(0xC35DC700, 0xC3AB8B40, [PREREAD PREWRITE ________=20
_________])
-> Writeback Invalidate 0xC3B97168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC35DC700, 0xC3B6F500, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B97170 (size: 0x00000009)
=3D> bus_dmamap_sync(0xC35DC700, 0xC3B6F500, [_______ ________ POSTREAD=20
POSTWRITE])
-> Invalidate 0xC3B97170 (size: 0x00000009)
usb_alloc_device:1729: Failure selecting configuration index 0: USB_ERR_INV=
AL,=20
port 1, addr 2 (ignored)
ugen0.2: <PQI> at usbus0
=2D---- USB Stack with my patch -----
ugen0.1: <Marvell> at usbus0
uhub0: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
ugen1.1: <Marvell> at usbus1
uhub1: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus1
ugen2.1: <Marvell> at usbus2
uhub2: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus2
Root mount waiting for: usbus2 usbus1 usbus0
uhub0: 1 port with 1 removable, self powered
uhub1: 1 port with 1 removable, self powered
uhub2: 1 port with 1 removable, self powered
=3D> bus_dmamap_sync(0xC3A9E780, 0xC3B6F540, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9E168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E500, 0xC3AB8C40, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9D168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E500, 0xC3AB8C00, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9D170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E500, 0xC3AB8C00, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9D170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000012)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000012)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000004)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000004)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
Root mount waiting for: usbus0
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000022)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000022)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000002)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000022)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000022)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000009)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000009)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000020)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000020)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
ugen0.2: <pqi> at usbus0
umass0: <pqi IntelligentStick, class 0/0, rev 2.00/11.00, addr 2> on usbus0
umass0: SCSI over Bulk-Only; quirks =3D 0x0000
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F080, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3B9C168 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000001)
=3D> bus_dmamap_sync(0xC3A9E280, 0xC3B6F140, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3B9C170 (size: 0x00000001)
Root mount waiting for: usbus0
umass0:0:0:-1: Attached to scbus0
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
Trying to mount root from nfs:10.0.0.201:/nfsroot/mv78100-4/
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB6098 (size: 0x00000024)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB6098 (size: 0x00000024)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Invalidate 0xC3BC0500 (size: 0x00000100)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Invalidate 0xC3BC0500 (size: 0x00000100)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BBC0A0 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BBC0A0 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
da0 at umass-sim0 bus 0 target 0 lun 0
da0: <pqi IntelligentStick 1100> Removable Direct Access SCSI-0 device
da0: 40.000MB/s transfers
da0: 1912MB (3915776 512 byte sectors: 255H 63S/T 243C)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
NFS ROOT: 10.0.0.201:/nfsroot/mv78100-4/
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3AB9C80 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3AB9C80 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BBAC70 (size: 0x00000020)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BBAC70 (size: 0x00000020)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Invalidate 0xC3B6D800 (size: 0x00000200)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Invalidate 0xC3B6D800 (size: 0x00000200)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Invalidate 0xC3C2A000 (size: 0x00002000)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Invalidate 0xC3C2A000 (size: 0x00002000)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3AB9B50 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3AB9B50 (size: 0x00000008)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BBAC70 (size: 0x00000020)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB00C0, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BBAC70 (size: 0x00000020)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB0380, [_______ PREWRITE ________=20
_________])
-> Writeback 0xC3BB23A8 (size: 0x0000001F)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=3D> bus_dmamap_sync(0xC3A9E480, 0xC3BB8080, [PREREAD ________ ________=20
_________])
-> Writeback Invalidate 0xC3BB2770 (size: 0x0000000D)
=2D-=20
Best regards,
Piotr Zi=EAcik
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