From owner-freebsd-embedded@FreeBSD.ORG Tue Dec 27 00:07:01 2011 Return-Path: Delivered-To: freebsd-embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E6C9F106564A; Tue, 27 Dec 2011 00:07:01 +0000 (UTC) (envelope-from stb@lassitu.de) Received: from gilb.zs64.net (gilb.zs64.net [IPv6:2001:470:1f0b:105e::1ea]) by mx1.freebsd.org (Postfix) with ESMTP id 475E28FC15; Tue, 27 Dec 2011 00:07:01 +0000 (UTC) Received: by gilb.zs64.net (Postfix, from stb@lassitu.de) id 6D7D6A0031; Tue, 27 Dec 2011 00:07:00 +0000 (UTC) Mime-Version: 1.0 (Apple Message framework v1251.1) Content-Type: multipart/mixed; boundary="Apple-Mail=_67BAA412-B86D-4ADF-850D-FC1A49EADEB9" From: Stefan Bethke In-Reply-To: Date: Tue, 27 Dec 2011 01:07:00 +0100 Message-Id: References: <0F6CC18F-6973-42A2-AC03-F01BF59458AE@lassitu.de> <1100F70E-9DA9-4163-AC9A-423ECE5AA9A3@lassitu.de> <18CABB46-9B9A-41CB-8742-6723C5FF4D67@lassitu.de> <2CBD8651-E132-49DC-A082-37A8F5C626EA@bsdimp.com> <09670C 34-0D30-46BC-BA7E-4AAA22193B61@lassitu.de> <45529EC2-73BE-4F69-A9BE-E22D9FEAADD7@lassitu.de> To: Adrian Chadd X-Mailer: Apple Mail (2.1251.1) Cc: Oleksandr Tymoshenko , "freebsd-embedded@freebsd.org" Subject: Re: Updated switch/glue patch? X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Dec 2011 00:07:02 -0000 --Apple-Mail=_67BAA412-B86D-4ADF-850D-FC1A49EADEB9 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii Am 26.12.2011 um 21:46 schrieb Adrian Chadd: > Hi, >=20 > I've tested the two patches. >=20 > * the iicbb patch is fine at first glance, but I haven't yet sat down > to figure out whether it's fine for older (and non-rtl8366rb) devices. > I'll commit it to my repo, so you can just pull it into yours. > We should likely change it to default to 10uS to preserve behaviour > and then override it in hints (hint.iicbb.0.udelay=3D3) for this > particular board. >=20 > * the rtl8366rb change however applied and compiled, but it has > completely broken things. I don't get any port status updates and > etherswitchcfg doesn't actually return any configuration. Would you > mind retesting all of that? Here's a slightly updated patch (pushed to = https://gitorious.org/~stb/freebsd/stb-adrianchadd-freebsd-work/commits/wo= rk/ath): --Apple-Mail=_67BAA412-B86D-4ADF-850D-FC1A49EADEB9 Content-Disposition: attachment; filename=rtl8366rb.patch Content-Type: application/octet-stream; x-unix-mode=0644; name="rtl8366rb.patch" Content-Transfer-Encoding: 7bit diff --git a/sys/dev/etherswitch/rtl8366rb.c b/sys/dev/etherswitch/rtl8366rb.c index f41a425..a2566b4 100644 --- a/sys/dev/etherswitch/rtl8366rb.c +++ b/sys/dev/etherswitch/rtl8366rb.c @@ -139,7 +139,7 @@ rtl8366rb_attach(device_t dev) sc = device_get_softc(dev); sc->dev = dev; - mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, + mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "rtl8366rb", MTX_DEF); rtl8366rb_init(dev); smi_read(dev, RTL8366RB_CVCR, &rev); @@ -200,17 +200,69 @@ rtl8366rb_detach(device_t dev) return (0); } +static int +rtl8366rb_media_from_portstatus(int portstatus) +{ + int media; + + if ((portstatus & RTL8366RB_PLSR_LINK) == 0) + return IFM_ETHER | IFM_NONE; + media = IFM_ETHER; + switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) { + case RTL8366RB_PLSR_SPEED_10: + media |= IFM_10_T; + break; + case RTL8366RB_PLSR_SPEED_100: + media |= IFM_100_TX; + break; + case RTL8366RB_PLSR_SPEED_1000: + media |= IFM_1000_T; + break; + } + if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) != 0) + media |= IFM_FDX; + else + media |= IFM_HDX; + if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0) + media |= IFM_ETH_TXPAUSE; + if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0) + media |= IFM_ETH_RXPAUSE; + return media; +} + +static void +rtl833rb_miipollstat(struct rtl8366rb_softc *sc) +{ + int i; + struct mii_data *mii; + struct mii_softc *child; + uint16_t value; + int portstatus; + + for (i = 0; i < RTL8366RB_NUM_PORTS-1; i++) { + mii = device_get_softc(sc->miibus[i]); + if ((i % 2) == 0) { + smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value); + portstatus = value & 0xff; + } else { + portstatus = (value >> 8) & 0xff; + } + mii->mii_media_status = IFM_AVALID; + mii->mii_media_active = rtl8366rb_media_from_portstatus(portstatus); + LIST_FOREACH(child, &mii->mii_phys, mii_list) { + if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != child->mii_inst) + continue; + (void)PHY_SERVICE(child, mii, MII_POLLSTAT); + } + } +} + static void rtl8366rb_tick(void *arg) { struct rtl8366rb_softc *sc = arg; - int i; - for (i=0; i < RTL8366RB_NUM_PORTS-1; i++) { - if (sc->miibus[i] != NULL) - mii_tick(device_get_softc(sc->miibus[i])); - mii_pollstat(device_get_softc(sc->miibus[i])); - } + rtl833rb_miipollstat(sc); callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc); } @@ -333,20 +385,7 @@ rtl_getport(device_t dev, etherswitch_port_t *p) ifmr->ifm_count = 0; smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PORTS-1)/2, &v); v = v >> (8 * ((RTL8366RB_NUM_PORTS-1) % 2)); - switch (v & RTL8366RB_PLSR_SPEED_MASK) { - case RTL8366RB_PLSR_SPEED_10: - ifmr->ifm_current = IFM_ETHER | IFM_10_T; - break; - case RTL8366RB_PLSR_SPEED_100: - ifmr->ifm_current = IFM_ETHER | IFM_100_TX; - break; - case RTL8366RB_PLSR_SPEED_1000: - ifmr->ifm_current = IFM_ETHER | IFM_1000_T; - break; - } - if ((v & RTL8366RB_PLSR_FULLDUPLEX) != 0) - ifmr->ifm_current |= IFM_FDX; - ifmr->ifm_active = ifmr->ifm_current; + ifmr->ifm_active = ifmr->ifm_current = rtl8366rb_media_from_portstatus(v); ifmr->ifm_mask = 0; ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; } @@ -435,10 +474,7 @@ rtl8366rb_ifmedia_upd(struct ifnet *ifp) { struct rtl8366rb_softc *sc = ifp->if_softc; struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]); - struct mii_softc *miisc; - LIST_FOREACH(miisc, &mii->mii_phys, mii_list) - PHY_RESET(miisc); mii_mediachg(mii); return (0); } diff --git a/sys/dev/etherswitch/rtl8366rbvar.h b/sys/dev/etherswitch/rtl8366rbvar.h index f14373a..3c6067b 100644 --- a/sys/dev/etherswitch/rtl8366rbvar.h +++ b/sys/dev/etherswitch/rtl8366rbvar.h @@ -43,8 +43,9 @@ #define RTL8366RB_SGCR_MAX_LENGTH_1536 0x0010 #define RTL8366RB_SGCR_MAX_LENGTH_1552 0x0020 #define RTL8366RB_SGCR_MAX_LENGTH_9216 0x0030 -#define RTL8366RB_SGCR_EN_VLAN 0x2000 -#define RTL8366RB_SGCR_EN_VLAN_4KTB 0x4000 +#define RTL8366RB_SGCR_EN_VLAN 0x2000 +#define RTL8366RB_SGCR_EN_VLAN_4KTB 0x4000 +#define RTL8366RB_SGCR_EN_QOS 0x8000 /* Port Enable Control: DISABLE_PORT[5:0] */ #define RTL8366RB_PECR 0x0001 @@ -65,27 +66,28 @@ #define RTL8366RB_PLSR_SPEED_10 0x00 #define RTL8366RB_PLSR_SPEED_100 0x01 #define RTL8366RB_PLSR_SPEED_1000 0x02 -#define RTL8366RB_PLSR_FULLDUPLEX 0x10 +#define RTL8366RB_PLSR_FULLDUPLEX 0x08 +#define RTL8366RB_PLSR_LINK 0x10 #define RTL8366RB_PLSR_TXPAUSE 0x20 #define RTL8366RB_PLSR_RXPAUSE 0x40 #define RTL8366RB_PLSR_NO_AUTO 0x80 /* VLAN Member Configuration, 3 registers per VLAN */ #define RTL8366RB_VMCR_BASE 0x0020 -#define RTL8366RB_VMCR_MULT 3 -#define RTL8366RB_VMCR_DOT1Q_REG 0 +#define RTL8366RB_VMCR_MULT 3 +#define RTL8366RB_VMCR_DOT1Q_REG 0 #define RTL8366RB_VMCR_DOT1Q_VID_SHIFT 0 #define RTL8366RB_VMCR_DOT1Q_VID_MASK 0x0fff #define RTL8366RB_VMCR_DOT1Q_PCP_SHIFT 12 #define RTL8366RB_VMCR_DOT1Q_PCP_MASK 0x7000 -#define RTL8366RB_VMCR_MU_REG 1 +#define RTL8366RB_VMCR_MU_REG 1 #define RTL8366RB_VMCR_MU_MEMBER_SHIFT 0 #define RTL8366RB_VMCR_MU_MEMBER_MASK 0x00ff #define RTL8366RB_VMCR_MU_UNTAG_SHIFT 8 #define RTL8366RB_VMCR_MU_UNTAG_MASK 0xff00 -#define RTL8366RB_VMCR_FID_REG 2 +#define RTL8366RB_VMCR_FID_REG 2 #define RTL8366RB_VMCR_FID_FID_SHIFT 0 -#define RTL8366RB_VMCR_FID_FID_MASK 0x0007 +#define RTL8366RB_VMCR_FID_FID_MASK 0x0007 #define RTL8366RB_VMCR(_reg, _vlan) \ (RTL8366RB_VMCR_BASE + _reg + _vlan * RTL8366RB_VMCR_MULT) /* VLAN Identifier */ @@ -93,13 +95,15 @@ (_r[RTL8366RB_VMCR_DOT1Q_REG] & RTL8366RB_VMCR_DOT1Q_VID_MASK) /* Priority Code Point */ #define RTL8366RB_VMCR_PCP(_r) \ - ((_r[RTL8366RB_VMCR_DOT1Q_REG] & RTL8366RB_VMCR_DOT1Q_PCP_MASK) >> RTL8366RB_VMCR_DOT1Q_PCP_SHIFT) + ((_r[RTL8366RB_VMCR_DOT1Q_REG] & RTL8366RB_VMCR_DOT1Q_PCP_MASK) \ + >> RTL8366RB_VMCR_DOT1Q_PCP_SHIFT) /* Member ports */ #define RTL8366RB_VMCR_MEMBER(_r) \ (_r[RTL8366RB_VMCR_MU_REG] & RTL8366RB_VMCR_MU_MEMBER_MASK) /* Untagged ports */ #define RTL8366RB_VMCR_UNTAG(_r) \ - ((_r[RTL8366RB_VMCR_MU_REG] & RTL8366RB_VMCR_MU_UNTAG_MASK) >> RTL8366RB_VMCR_MU_UNTAG_SHIFT) + ((_r[RTL8366RB_VMCR_MU_REG] & RTL8366RB_VMCR_MU_UNTAG_MASK) \ + >> RTL8366RB_VMCR_MU_UNTAG_SHIFT) /* Forwarding ID */ #define RTL8366RB_VMCR_FID(_r) \ (_r[RTL8366RB_VMCR_FID_REG] & RTL8366RB_VMCR_FID_FID_MASK) @@ -135,6 +139,19 @@ /* VLAN Ingress Control 2: [5:0] */ #define RTL8366RB_VIC2R 0x037f +/* MIB registers */ +#define RTL8366RB_MCNT_BASE 0x1000 +#define RTL8366RB_MCTLR 0x13f0 +#define RTL8366RB_MCTLR_BUSY 0x0001 +#define RTL8366RB_MCTLR_RESET 0x0002 +#define RTL8366RB_MCTLR_RESET_PORT_MASK 0x00fc +#define RTL8366RB_MCTLR_RESET_ALL 0x0800 + +#define RTL8366RB_MCNT(_port, _r) \ + (RTL8366RB_MCNT_BASE + 0x50 * (_port) + (_r)) +#define RTL8366RB_MCTLR_RESET_PORT(_p) \ + (1 << ((_p) + 2)) + /* PHY Access Control */ #define RTL8366RB_PACR 0x8000 #define RTL8366RB_PACR_WRITE 0x0000 diff --git a/sys/dev/iicbus/iicbb.c b/sys/dev/iicbus/iicbb.c index 7c03ab4..cdb65e5 100644 --- a/sys/dev/iicbus/iicbb.c +++ b/sys/dev/iicbus/iicbb.c @@ -437,7 +437,6 @@ iicbb_start(device_t dev, u_char slave, int timeout) static int iicbb_stop(device_t dev) { - i2c_stop(dev); I2C_LOG(">\n"); return (0); --Apple-Mail=_67BAA412-B86D-4ADF-850D-FC1A49EADEB9 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=us-ascii Stefan -- Stefan Bethke Fon +49 151 14070811 --Apple-Mail=_67BAA412-B86D-4ADF-850D-FC1A49EADEB9--