Date: Fri, 27 Apr 2018 17:41:18 +0000 (UTC) From: Jan Beich <jbeich@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r468476 - in head/devel/llvm60: . files Message-ID: <201804271741.w3RHfIjD035030@repo.freebsd.org>
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Author: jbeich Date: Fri Apr 27 17:41:18 2018 New Revision: 468476 URL: https://svnweb.freebsd.org/changeset/ports/468476 Log: devel/llvm60: apply i386 crashfix after r467849 PR: 227686, 227698 Approved by: portmgr blanket Added: head/devel/llvm60/files/patch-fsvn-r332898 (contents, props changed) Modified: head/devel/llvm60/Makefile (contents, props changed) Modified: head/devel/llvm60/Makefile ============================================================================== --- head/devel/llvm60/Makefile Fri Apr 27 17:16:24 2018 (r468475) +++ head/devel/llvm60/Makefile Fri Apr 27 17:41:18 2018 (r468476) @@ -2,7 +2,7 @@ PORTNAME= llvm DISTVERSION= 6.0.0 -PORTREVISION= 2 +PORTREVISION= 3 CATEGORIES= devel lang MASTER_SITES= http://${PRE_}releases.llvm.org/${LLVM_RELEASE}/${RCDIR} PKGNAMESUFFIX= ${LLVM_SUFFIX} Added: head/devel/llvm60/files/patch-fsvn-r332898 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/llvm60/files/patch-fsvn-r332898 Fri Apr 27 17:41:18 2018 (r468476) @@ -0,0 +1,62 @@ +commit de8877900af2a4af25465be5fde7e460ffee08a2 +Author: dim <dim@FreeBSD.org> +Date: Mon Apr 23 23:07:57 2018 +0000 + + Pull in r329771 from upstream llvm trunk (by Craig Topper): + + [X86] In X86FlagsCopyLowering, when rewriting a memory setcc we need + to emit an explicit MOV8mr instruction. + + Previously the code only knew how to handle setcc to a register. + + This should fix a crash in the chromium build. + + This fixes various assertion failures while building ports targeting + i386: + * www/firefox: isReg() && "This is not a register operand!" + * www/iridium, www/qt5-webengine: (I.atEnd() || std::next(I) == + def_instr_end()) && "getVRegDef assumes a single definition or no + definition" + * devel/powerpc64-gcc: FromReg != ToReg && "Cannot replace a reg with + itself" + + Reported by: jbeich + PR: 225330, 227686, 227698, 227699 + MFC after: 1 week + X-MFC-With: r332833 + +diff --git lib/Target/X86/X86FlagsCopyLowering.cpp lib/Target/X86/X86FlagsCopyLowering.cpp +index 1b6369b7bfd9..1fd1c704d79a 100644 +--- lib/Target/X86/X86FlagsCopyLowering.cpp ++++ lib/Target/X86/X86FlagsCopyLowering.cpp +@@ -770,8 +770,27 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB, + if (!CondReg) + CondReg = promoteCondToReg(TestMBB, TestPos, TestLoc, Cond); + +- // Rewriting this is trivial: we just replace the register and remove the +- // setcc. +- MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg); ++ // Rewriting a register def is trivial: we just replace the register and ++ // remove the setcc. ++ if (!SetCCI.mayStore()) { ++ assert(SetCCI.getOperand(0).isReg() && ++ "Cannot have a non-register defined operand to SETcc!"); ++ MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg); ++ SetCCI.eraseFromParent(); ++ return; ++ } ++ ++ // Otherwise, we need to emit a store. ++ auto MIB = BuildMI(*SetCCI.getParent(), SetCCI.getIterator(), ++ SetCCI.getDebugLoc(), TII->get(X86::MOV8mr)); ++ // Copy the address operands. ++ for (int i = 0; i < X86::AddrNumOperands; ++i) ++ MIB.add(SetCCI.getOperand(i)); ++ ++ MIB.addReg(CondReg); ++ ++ MIB->setMemRefs(SetCCI.memoperands_begin(), SetCCI.memoperands_end()); ++ + SetCCI.eraseFromParent(); ++ return; + }
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