From owner-freebsd-amd64@FreeBSD.ORG Mon Feb 14 05:46:44 2005 Return-Path: Delivered-To: freebsd-amd64@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 6629316A4CE for ; Mon, 14 Feb 2005 05:46:44 +0000 (GMT) Received: from pooker.samsco.org (pooker.samsco.org [168.103.85.57]) by mx1.FreeBSD.org (Postfix) with ESMTP id 4689643D55 for ; Mon, 14 Feb 2005 05:46:39 +0000 (GMT) (envelope-from scottl@samsco.org) Received: from [192.168.254.19] (ibook-nai.samsco.home [192.168.254.19]) (authenticated bits=0) by pooker.samsco.org (8.13.1/8.13.1) with ESMTP id j1E5krCx024704; Sun, 13 Feb 2005 22:46:54 -0700 (MST) (envelope-from scottl@samsco.org) Message-ID: <42103B29.8070901@samsco.org> Date: Sun, 13 Feb 2005 22:46:17 -0700 From: Scott Long User-Agent: Mozilla/5.0 (Macintosh; U; PPC Mac OS X Mach-O; en-US; rv:1.7.5) Gecko/20041217 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Thomas Krause -CI- References: <420F9CA1.4040207@chef-ingenieur.de> In-Reply-To: <420F9CA1.4040207@chef-ingenieur.de> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.8 required=3.8 tests=ALL_TRUSTED autolearn=failed version=3.0.2 X-Spam-Checker-Version: SpamAssassin 3.0.2 (2004-11-16) on pooker.samsco.org cc: freebsd-amd64@freebsd.org Subject: Re: -mno-sse -mno-sse2 -mno-mmx -mno-3dnow when compiling kernel X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2005 05:46:44 -0000 Thomas Krause -CI- wrote: > Hello, > why are the Switches "-mno-sse -mno-sse2 -mno-mmx -mno-3dnow" are set > when compiling an amd64 kernel? I think, the CPU supports all thease > features. > > Features=0x78bfbff > > > I have no CPUTYPE specified in /etc/make.conf, as I could not > find a matching option in /usr/src/share/examples/etc/make.conf. > > Kind regards, > Thomas Floating point, MMX, SSE, SSE2, and 3dnow, registers are not usable in the kernel. By not using these registers, we save the expense of saving and restoring them on every single syscall. Using them without saving them would run the risk of colliding with userland programs that do use them. Whether or not the kernel is compiled with instructions that use these registers has absolutely no bearing on whether userland code can use them. It's purely about trading one optimization (using optimized opcodes in the kernel) for another (not having to save and restore dozens of registers to the stack on each syscall). It might be interesting to experiment with allowing a certain class of instructions in the kernel and saving and restoring the associated registers, and seeing if GCC will actually generate code that is better and overcomes the save/restore expense. Any takers? Scott