Date: Sat, 29 Aug 1998 16:44:20 -0400 (EDT) From: "Paul T. Haddad" <paul@pth.com> To: mike@smith.net.au (Mike Smith) Cc: freebsd-smp@FreeBSD.ORG Subject: Re: Problem with spl0() IFCPL_LOCK/ss_lock Message-ID: <9808292044.AA19149@pth.com> In-Reply-To: <199808291021.KAA07307@word.smith.net.au> from "Mike Smith" at Aug 29, 98 10:21:18 am
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Hi,
> It would be useful to see the output of 'mptable' on this system; I
> seem to recall seeing similar symptoms reported on systems where the
> CPU ID's weren't assigned correctly.
>
Sure I've included it below.
Paul
===============================================================================
MPTable, version 2.0.15
-------------------------------------------------------------------------------
MP Floating Pointer Structure:
location: BIOS
physical address: 0x000f7cb0
signature: '_MP_'
length: 16 bytes
version: 1.4
checksum: 0x55
mode: Virtual Wire
-------------------------------------------------------------------------------
MP Config Table Header:
physical address: 0x000f7cc0
signature: 'PCMP'
base table length: 308
version: 1.4
checksum: 0x0b
OEM ID: 'INTEL '
Product ID: 'XXPRESS '
OEM table pointer: 0x00000000
OEM table size: 0
entry count: 27
local APIC address: 0xfee00000
extended table length: 200
extended table checksum: 133
-------------------------------------------------------------------------------
MP Config Base Table Entries:
--
Processors: APIC ID Version State Family Model Step Flags
0 0x10 BSP, usable 5 2 5 0x03bf
2 0x10 AP, usable 5 2 5 0x03bf
3 0x10 AP, usable 5 2 5 0x03bf
4 0x10 AP, usable 5 2 5 0x03bf
--
Bus: Bus ID Type
0 PCI
1 PCI
18 XPRESS
19 EISA
--
I/O APICs: APIC ID Version State Address
14 0x11 usable 0xfec00000
--
I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
ExtINT active-hi edge 19 0 14 0
INT active-hi edge 19 1 14 1
INT active-hi edge 19 0 14 2
INT active-hi edge 19 3 14 3
INT active-hi edge 19 4 14 4
INT active-hi edge 19 5 14 5
INT active-hi edge 19 6 14 6
INT active-hi edge 19 7 14 7
INT active-hi edge 19 8 14 8
INT conforms level 19 9 14 9
INT conforms level 19 10 14 10
INT conforms level 19 11 14 11
INT active-hi edge 19 12 14 12
INT active-hi edge 19 13 14 13
INT active-hi edge 19 14 14 14
INT conforms level 19 15 14 15
--
Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
ExtINT active-hi edge 19 0 255 0
NMI active-hi edge 0 0:A 255 1
-------------------------------------------------------------------------------
MP Config Extended Table Entries:
--
bus ID: 0 address type: memory address
address base: 0xe8000
address range: 0x4000
--
bus ID: 0 address type: memory address
address base: 0xa0000
address range: 0x20000
--
bus ID: 1 address type: prefetch address
address base: 0xffb00000
address range: 0x100000
--
bus ID: 1 address type: memory address
address base: 0xffc00000
address range: 0x100000
--
bus ID: 1 address type: I/O address
address base: 0xf000
address range: 0x1000
--
bus ID: 0 address type: memory address
address base: 0x2000000
address range: 0xfdb00000
--
bus ID: 0 address type: memory address
address base: 0xffd00000
address range: 0x300000
--
bus ID: 0 address type: I/O address
address base: 0x0
address range: 0xf000
--
_atexit
bus ID: 19 bus info: 0x01 parent bus ID: 0--
@S
bus ID: 0 address modifier: add
predefined range: 0x00000000--
@S
bus ID: 0 address modifier: add
predefined range: 0x00000001--
@S
bus ID: 1 address modifier: subtract
predefined range: 0x00000000--
@S
bus ID: 1 address modifier: subtract
predefined range: 0x00000001
-------------------------------------------------------------------------------
# SMP kernel config file options:
# Required:
options SMP # Symmetric MultiProcessor Kernel
options APIC_IO # Symmetric (APIC) I/O
# Optional (built-in defaults will work in most cases):
#options NCPU=4 # number of CPUs
#options NBUS=4 # number of busses
#options NAPIC=1 # number of IO APICs
#options NINTR=24 # number of INTs
===============================================================================
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