Date: Sat, 4 Aug 2018 02:30:51 +0000 (UTC) From: Alan Cox <alc@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r337282 - head/contrib/llvm/tools/lld/ELF/Arch Message-ID: <201808040230.w742UpiR048545@repo.freebsd.org>
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Author: alc Date: Sat Aug 4 02:30:51 2018 New Revision: 337282 URL: https://svnweb.freebsd.org/changeset/base/337282 Log: Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 Modified: head/contrib/llvm/tools/lld/ELF/Arch/AArch64.cpp head/contrib/llvm/tools/lld/ELF/Arch/X86.cpp Modified: head/contrib/llvm/tools/lld/ELF/Arch/AArch64.cpp ============================================================================== --- head/contrib/llvm/tools/lld/ELF/Arch/AArch64.cpp Sat Aug 4 01:45:17 2018 (r337281) +++ head/contrib/llvm/tools/lld/ELF/Arch/AArch64.cpp Sat Aug 4 02:30:51 2018 (r337282) @@ -66,6 +66,10 @@ AArch64::AArch64() { PltHeaderSize = 32; DefaultMaxPageSize = 65536; + // Align to the 2 MiB page size (known as a superpage or huge page). + // FreeBSD automatically promotes 2 MiB-aligned allocations. + DefaultImageBase = 0x200000; + // It doesn't seem to be documented anywhere, but tls on aarch64 uses variant // 1 of the tls structures and the tcb size is 16. TcbSize = 16; Modified: head/contrib/llvm/tools/lld/ELF/Arch/X86.cpp ============================================================================== --- head/contrib/llvm/tools/lld/ELF/Arch/X86.cpp Sat Aug 4 01:45:17 2018 (r337281) +++ head/contrib/llvm/tools/lld/ELF/Arch/X86.cpp Sat Aug 4 02:30:51 2018 (r337282) @@ -61,6 +61,10 @@ X86::X86() { PltHeaderSize = 16; TlsGdRelaxSkip = 2; TrapInstr = 0xcccccccc; // 0xcc = INT3 + + // Align to the non-PAE large page size (known as a superpage or huge page). + // FreeBSD automatically promotes large, superpage-aligned allocations. + DefaultImageBase = 0x400000; } static bool hasBaseReg(uint8_t ModRM) { return (ModRM & 0xc7) != 0x5; }
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