From owner-p4-projects@FreeBSD.ORG Tue May 1 19:33:34 2007 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E154416A40E; Tue, 1 May 2007 19:33:33 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 6F10D16A408 for ; Tue, 1 May 2007 19:33:33 +0000 (UTC) (envelope-from bms@incunabulum.net) Received: from repoman.freebsd.org (repoman.freebsd.org [69.147.83.41]) by mx1.freebsd.org (Postfix) with ESMTP id 4154E13C4DD for ; Tue, 1 May 2007 19:33:33 +0000 (UTC) (envelope-from bms@incunabulum.net) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.8/8.13.8) with ESMTP id l41JXXWg056653 for ; Tue, 1 May 2007 19:33:33 GMT (envelope-from bms@incunabulum.net) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.8/8.13.8/Submit) id l41JXX2a056647 for perforce@freebsd.org; Tue, 1 May 2007 19:33:33 GMT (envelope-from bms@incunabulum.net) Date: Tue, 1 May 2007 19:33:33 GMT Message-Id: <200705011933.l41JXX2a056647@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to bms@incunabulum.net using -f From: Bruce M Simpson To: Perforce Change Reviews Cc: Subject: PERFORCE change 119115 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 May 2007 19:33:34 -0000 http://perforce.freebsd.org/chv.cgi?CH=119115 Change 119115 by bms@bms_anglepoise on 2007/05/01 19:32:39 Move the hack which sets a default clock frequency under a compile-time kernel option. Create a separate include file for things relating to the YAMON boot monitor API. Affected files ... .. //depot/projects/mips2/src/sys/conf/options.mips#3 edit .. //depot/projects/mips2/src/sys/mips/conf/MALTA#12 edit .. //depot/projects/mips2/src/sys/mips/mips/tick.c#7 edit .. //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.c#2 edit .. //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.h#1 add Differences ... ==== //depot/projects/mips2/src/sys/conf/options.mips#3 (text+ko) ==== @@ -6,3 +6,4 @@ KERNPHYSADDR opt_global.h KERNVIRTADDR opt_global.h PHYSADDR opt_global.h +TICK_USE_YAMON_FREQ opt_global.h ==== //depot/projects/mips2/src/sys/mips/conf/MALTA#12 (text+ko) ==== @@ -28,6 +28,7 @@ makeoptions MODULES_OVERRIDE="" options KERNVIRTADDR=0x80100000 +options TICK_USE_YAMON_FREQ=defined include "../mips4k/malta/std.malta" hints "MALTA.hints" #Default places to look for devices. ==== //depot/projects/mips2/src/sys/mips/mips/tick.c#7 (text+ko) ==== @@ -28,8 +28,6 @@ /* * Simple driver for the 32-bit interval counter built in to all * MIPS32 CPUs. - * XXX: For calibration this either needs an external clock, or - * to be explicitly told what the frequency is. */ #include @@ -51,6 +49,10 @@ #include #include +#ifdef TICK_USE_YAMON_FREQ +#include +#endif + uint64_t counter_freq; uint64_t counts_per_hz; uint32_t counts_per_usec; @@ -77,40 +79,45 @@ static uint64_t tick_ticker(void) { + return ((uint64_t)mips_rd_count()); } -#if 1 -extern char *yamon_getenv(char *); -#endif - void tick_init_params(void) { -#ifdef notyet - u_int64_t counterval[2]; -#endif if (bootverbose) printf("Calibrating MIPS32 clock ... "); -#ifdef notyet - counterval[0] = mips_rd_count(); - DELAY(1000000); - counterval[1] = mips_rd_count(); - counter_freq = counterval[1] - counterval[0]; -#else - /* XXX: The boot monitor told us the CPU frequency. */ - { + do { +#ifdef TICK_USE_YAMON_FREQ + /* + * Use the clock frequency specified in the environment + * variables providied to us by the YAMON monitor. + */ char *cp = yamon_getenv("khz"); - printf("cp: %s\n", cp); + if (cp == NULL) { - printf("cannot determine clock frequency, defaulting to 10MHz\n"); + printf("cannot determine clock frequency, " + "defaulting to 10MHz\n"); counter_freq = 10000000; - } else + } else { counter_freq = strtol(cp, (char **)NULL, 10) * 1000 ; - } + } +#else + /* + * Determine clock frequency from hardware. + * XXX: Requires a working DELAY() macro. + */ + u_int64_t counterval[2]; + + counterval[0] = mips_rd_count(); + DELAY(1000000); + counterval[1] = mips_rd_count(); + counter_freq = counterval[1] - counterval[0]; #endif + } while (0); counts_per_hz = counter_freq / hz; counts_per_usec = counter_freq / 1000000; @@ -190,7 +197,7 @@ /* * Device section of file below - */ + */ static int clock_intr(void *arg) { ==== //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.c#2 (text+ko) ==== @@ -31,14 +31,7 @@ #include #include -char* yamon_getenv(char *name); - -typedef struct { - char *name; - char *value; -} yamon_env_t; - -extern yamon_env_t *fenvp[]; +#include char * yamon_getenv(char *name)