From owner-freebsd-hardware Wed Sep 12 8: 6:58 2001 Delivered-To: freebsd-hardware@freebsd.org Received: from clyde.goodleaf.net (piscator.seanet.com [199.181.165.218]) by hub.freebsd.org (Postfix) with ESMTP id 6A26037B405 for ; Wed, 12 Sep 2001 08:06:55 -0700 (PDT) Received: by clyde.goodleaf.net (Postfix, from userid 1001) id C915F5C77; Wed, 12 Sep 2001 08:07:00 -0700 (PDT) From: "J. Goodleaf" To: hardware@freebsd.org Subject: optimizations for P4? Date: Wed, 12 Sep 2001 15:07:00 GMT Mime-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <20010912150700.C915F5C77@clyde.goodleaf.net> Sender: owner-freebsd-hardware@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.org Didn't see a thread specifically about this in search of mailing lists, so I thought I'd ask. Am eyeballing the forthcoming P4 motherboards based on the VIA DDR chipset. My question: Given the many advancements over the P6 cores we're accustomed to, are there any compiler optimizations I can use when building world that will allow a reasonably full expression of the processor's potential? I ask because many early P4 benchmarks showed a distinct tendency for the P4 to do better when applications were compiled specifically for it. (See the controversy among several hardware site content providers on audio encoding a few months back.) I expect that the P4 will work with no trouble under a gcc buildworld, but will it be using those famous double-pumped ALUs (etc.) as well as it could? If not, I may as well go with AMD or PIIIs... Thx, J To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message