From owner-freebsd-current  Thu Jan 31 19:49:49 2002
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Date: Thu, 31 Jan 2002 19:49:24 -0800
From: Steve Kargl <sgk@troutmask.apl.washington.edu>
To: Terry Lambert <tlambert2@mindspring.com>
Cc: Peter Wemm <peter@wemm.org>,
	Kenneth Culver <culverk@yumyumyum.org>,
	"Cameron, Frank" <Cameron@ctc.com>,
	David Malone <dwmalone@maths.tcd.ie>,
	"'freebsd-bugs@freebsd.org'" <freebsd-bugs@FreeBSD.ORG>,
	"'freebsd-current@freebsd.org'" <freebsd-current@FreeBSD.ORG>
Subject: Re: AMD AGP Bug
Message-ID: <20020131194924.A93144@troutmask.apl.washington.edu>
References: <20020201022112.227833809@overcee.wemm.org> <3C5A09F1.CD638C3E@mindspring.com>
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In-Reply-To: <3C5A09F1.CD638C3E@mindspring.com>; from tlambert2@mindspring.com on Thu, Jan 31, 2002 at 07:22:25PM -0800
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On Thu, Jan 31, 2002 at 07:22:25PM -0800, Terry Lambert wrote:
> Peter Wemm wrote:
> > We need to use the PAT cpu_features feature.  This gives us 8 page attribute
> > modes instead of simple no-cache / writethrough flags.  We can (and must)
> > control more carefully the speculative hardware prefetch, for example.
> > 
> > I've been thinking about this with the pmap revamp that I'm working on.
> > It may solve the athlon problems too.
> 
> This sounds cool.
> 
> Do you have references to the page attribute stuff?  The
> books I have here don't discuss it; the only thing I see
> are 3 bits (9,10,11) that are "available" in the PDE and
> PTE?
> 

Well, twice in this thread you've offered info for
$10000.  I'm sure Peter can reciprocate with the 
info you seek for a similar price.


-- 
Steve

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