Date: Tue, 22 Jun 1999 10:48:44 -0400 From: Richard Cownie <tich@ma.ikos.com> To: Terry Lambert <tlambert@primenet.com>, gpalmer@FreeBSD.ORG (Gary Palmer) Cc: tich@ma.ikos.com, freebsd-smp@FreeBSD.ORG Subject: Re: SMP, 4GB RAM, 4x CPU Message-ID: <99062211111300.27479@par28.ma.ikos.com> References: <199906220043.RAA18994@usr01.primenet.com>
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On Mon, 21 Jun 1999, Terry Lambert wrote: > DEC (used to; haven't checked lately) have instruction scheduling > code up for download on gatekeeper.dec.com. From memory, running > it as an assembler preprocessor was pretty trivial. Of course, > DEC may have advanced the technology without posting new code, so > YMMV... To expose enough parallelism to get a good instruction schedule, you probably need to do a lot of stuff earlier in the compilation, e.g. loop unrolling, traversing the expression tree in a different order for code-generation/register-allocation. In particular, once the register allocation is cast in stone you don't have very much freedom to re-order instructions. So I doubt that the assembler pre-processor makes a big difference - if you want good performance from the Alpha (and why else would you want an Alpha ?) the DEC compiler is probably the only game in town. Unless anyone's tried the assembler scheduler and has figures to suggest otherwise ? I notice that egcs (soon to be gcc-2.95) has a bunch of new instruction-scheduling stuff, maybe this will do better than the old gcc. Richard Cownie (tich@ma.ikos.com) To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
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