From owner-svn-src-stable-11@freebsd.org Wed Apr 4 06:30:07 2018 Return-Path: Delivered-To: svn-src-stable-11@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E332CF940F6; Wed, 4 Apr 2018 06:30:06 +0000 (UTC) (envelope-from danfe@freebsd.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2610:1c1:1:6074::16:84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "freefall.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 954CF8CA1D; Wed, 4 Apr 2018 06:30:06 +0000 (UTC) (envelope-from danfe@freebsd.org) Received: by freefall.freebsd.org (Postfix, from userid 1033) id 8DA5E17B38; Wed, 4 Apr 2018 06:30:06 +0000 (UTC) Date: Wed, 4 Apr 2018 06:30:06 +0000 From: Alexey Dokuchaev To: Michal Meloun Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: Re: svn commit: r331988 - in stable/11/sys/arm: arm include Message-ID: <20180404063006.GA11981@FreeBSD.org> References: <201804040611.w346B6Xq054410@repo.freebsd.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201804040611.w346B6Xq054410@repo.freebsd.org> User-Agent: Mutt/1.9.2 (2017-12-15) X-BeenThere: svn-src-stable-11@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for only the 11-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Apr 2018 06:30:07 -0000 On Wed, Apr 04, 2018 at 06:11:06AM +0000, Michal Meloun wrote: > New Revision: 331988 > URL: https://svnweb.freebsd.org/changeset/base/331988 > > Log: > MFC r328467: > > Implement mitigation for Spectre version 2 attacks on ARMv7. > > + case CPU_ARCH_CORTEX_A8: > + /* > + * For Cortex-A8, IBE bit must be set otherwise > + * BPIALL is effectively NOP. > + * Unfortunately, Cortex-A is also affected by > + * ARM erratum 687067 which causes non-working > + * BPIALL if IBE bit is set and 'Instruction L1 System > + * Array Debug Register 0' is not 0. > + * This register is not reset on power-up and is > + * accessible only from secure world, so we cannot do > + * nothing (nor detect) to fix this issue. > + * I afraid that on chip ROM based secure monitor on "I'm afraid", perhaps? > + printf("!!!WARNING!!! CPU(%d) is vulnerable to speculative " > + "branch attacks. !!!\n" > + "Qualcomm Krait cores are known (or believed) to be " > + "vulnerable to \n" > + "speculative branch attacks, no mitigation exists yet.\n", > + PCPU_GET(cpuid)); > + goto unkonown_mitigation; > + } else { > + goto unkonown_mitigation; unkonown? :-) ./danfe