From owner-cvs-src-old@FreeBSD.ORG Mon Sep 20 17:40:07 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0283110656AA for ; Mon, 20 Sep 2010 17:40:07 +0000 (UTC) (envelope-from gibbs@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id A88BB8FC0A for ; Mon, 20 Sep 2010 17:40:06 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.4/8.14.4) with ESMTP id o8KHe6bo039272 for ; Mon, 20 Sep 2010 17:40:06 GMT (envelope-from gibbs@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.4/8.14.4/Submit) id o8KHe6nr039271 for cvs-src-old@freebsd.org; Mon, 20 Sep 2010 17:40:06 GMT (envelope-from gibbs@repoman.freebsd.org) Message-Id: <201009201740.o8KHe6nr039271@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to gibbs@repoman.freebsd.org using -f From: "Justin T. Gibbs" Date: Mon, 20 Sep 2010 17:39:49 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: RELENG_8 Subject: cvs commit: src/sys/dev/aic7xxx aic79xx.reg aic7xxx.reg src/sys/dev/aic7xxx/aicasm aicasm_gram.y X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Sep 2010 17:40:07 -0000 gibbs 2010-09-20 17:39:49 UTC FreeBSD src repository Modified files: (Branch: RELENG_8) sys/dev/aic7xxx aic79xx.reg aic7xxx.reg sys/dev/aic7xxx/aicasm aicasm_gram.y Log: SVN rev 212907 on 2010-09-20 17:39:49Z by gibbs MFC r210055: Correct logic bug in aicasm's undefined register bit access detection code. The code in question verifies that all register write operations only change bits that are defined (in the register definition file) for that effected register. The bug effectively disabled this checking. o Fix the check by testing the opcode against all supported read ("and" based) operands. o Add missing bit definitions to the aic7xxx and aic79xx register definition files so that the warning (treated as a fatal error) does not spuriously fire. Revision Changes Path 1.19.22.2 +1 -0 src/sys/dev/aic7xxx/aic79xx.reg 1.47.22.2 +1 -0 src/sys/dev/aic7xxx/aic7xxx.reg 1.26.2.2 +10 -5 src/sys/dev/aic7xxx/aicasm/aicasm_gram.y