From owner-freebsd-sparc64@freebsd.org Thu Sep 24 19:14:56 2015 Return-Path: Delivered-To: freebsd-sparc64@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id DF384A08B6E for ; Thu, 24 Sep 2015 19:14:56 +0000 (UTC) (envelope-from mark.cave-ayland@ilande.co.uk) Received: from s16892447.onlinehome-server.info (s16892447.onlinehome-server.info [82.165.15.123]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9AF941F4B; Thu, 24 Sep 2015 19:14:55 +0000 (UTC) (envelope-from mark.cave-ayland@ilande.co.uk) Received: from [90.194.78.68] (helo=[192.168.1.86]) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1ZfByg-0004Vv-4R; Thu, 24 Sep 2015 20:14:47 +0100 Message-ID: <56044B9C.8030105@ilande.co.uk> Date: Thu, 24 Sep 2015 20:14:36 +0100 From: Mark Cave-Ayland User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.8.0 MIME-Version: 1.0 To: Marius Strobl CC: Alexey Dokuchaev , "freebsd-sparc64@freebsd.org" References: <20150916031030.GA6711@FreeBSD.org> <55F9C2B8.7030605@ilande.co.uk> <20150916211914.GD18789@alchemy.franken.de> <20150917082817.GA71811@FreeBSD.org> <55FBB662.4080708@ilande.co.uk> <20150919211420.GK18789@alchemy.franken.de> <55FDEA3C.1010804@ilande.co.uk> <20150920043630.GA36162@FreeBSD.org> <20150922221404.GA81100@alchemy.franken.de> <560260A9.9010505@ilande.co.uk> <20150923204336.GO18789@alchemy.franken.de> In-Reply-To: <20150923204336.GO18789@alchemy.franken.de> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 90.194.78.68 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on s16892447.onlinehome-server.info X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=ALL_TRUSTED,BAYES_00, URIBL_BLOCKED autolearn=ham version=3.3.2 Subject: Re: PCI range checking under qemu-system-sparc64 X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-BeenThere: freebsd-sparc64@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Porting FreeBSD to the Sparc List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Sep 2015 19:14:57 -0000 On 23/09/15 21:43, Marius Strobl wrote: > On Wed, Sep 23, 2015 at 09:19:53AM +0100, Mark Cave-Ayland wrote: >> >> I've had a quick look through the relevant PDFs and the definitions I >> have for tick/stick are this: >> >> tick: >> bit 63: NPT (Non-Privileged Trap enable - defaults to 1) >> bits 62 - 0: CPU cycle counter >> >> tick_cmpr: >> bit 63: Interrupt disable (1 = no interrupt) >> bits 62 - 0: counter compare value >> >> stick: >> bit 63: Reserved (reads 0, no write) >> bits 62 - 0: stick register count value > > I cannot confirm that, the specification for the first sun4u CPU > having a %stick register (UltraSPARC III, see 1, p. 6-105) up to > the latest architecture specification (see 2, p. 60) say that bit > 32 of %stick is NPT, just as with %tick. Same for the specification > the Fujitsu SPARC64 processors follow (3, p. 90). Interesting. The document I'm referring to in my local collection is the UltraSPARC IIe specification which you can find a copy at http://www.coris.org.uk/misc/Sundocs/USIIe_ext_1.1.pdf (see page 29). I don't see this as necessarily being a conflict, it just seems that the IIe allows unprivileged access to %stick. ATB, Mark.