From owner-svn-src-head@freebsd.org Tue Aug 29 21:45:01 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id A8D93DE679E; Tue, 29 Aug 2017 21:45:01 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7893D724AE; Tue, 29 Aug 2017 21:45:01 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v7TLj0Ah049710; Tue, 29 Aug 2017 21:45:00 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v7TLj0Ts049709; Tue, 29 Aug 2017 21:45:00 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201708292145.v7TLj0Ts049709@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Tue, 29 Aug 2017 21:45:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r323001 - head/lib/libcompiler_rt X-SVN-Group: head X-SVN-Commit-Author: dim X-SVN-Commit-Paths: head/lib/libcompiler_rt X-SVN-Commit-Revision: 323001 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 29 Aug 2017 21:45:01 -0000 Author: dim Date: Tue Aug 29 21:45:00 2017 New Revision: 323001 URL: https://svnweb.freebsd.org/changeset/base/323001 Log: In compiler-rt, a few assembler implementations for i386 floating point conversion functions use SSE2 instructions, but these are not guarded by #ifdef __SSE2__, and there is no implementation using general purpose registers. For these functions, use the generic C variants instead, otherwise they will cause SIGILL on older processors. Reported by: bsdpr@phoe.frmug.org PR: 221733 MFC after: 1 week Modified: head/lib/libcompiler_rt/Makefile.inc Modified: head/lib/libcompiler_rt/Makefile.inc ============================================================================== --- head/lib/libcompiler_rt/Makefile.inc Tue Aug 29 21:04:29 2017 (r323000) +++ head/lib/libcompiler_rt/Makefile.inc Tue Aug 29 21:45:00 2017 (r323001) @@ -57,18 +57,12 @@ SRCF+= fixunsxfsi SRCF+= fixunsxfti SRCF+= fixxfdi SRCF+= fixxfti -SRCF+= floatdidf -SRCF+= floatdisf SRCF+= floatditf -SRCF+= floatdixf SRCF+= floatsitf SRCF+= floattidf SRCF+= floattisf SRCF+= floattixf -SRCF+= floatundidf -SRCF+= floatundisf SRCF+= floatunditf -SRCF+= floatundixf SRCF+= floatunsidf SRCF+= floatunsisf SRCF+= floatuntidf @@ -127,6 +121,23 @@ SRCF+= udivti3 SRCF+= umoddi3 SRCF+= umodsi3 SRCF+= umodti3 + +# Avoid using SSE2 instructions on i386. +.if ${MACHINE_CPUARCH} == "i386" +SRCS+= floatdidf.c +SRCS+= floatdisf.c +SRCS+= floatdixf.c +SRCS+= floatundidf.c +SRCS+= floatundisf.c +SRCS+= floatundixf.c +.else +SRCF+= floatdidf +SRCF+= floatdisf +SRCF+= floatdixf +SRCF+= floatundidf +SRCF+= floatundisf +SRCF+= floatundixf +.endif # __cpu_model support, only used on x86 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"