From owner-cvs-src@FreeBSD.ORG Tue Oct 18 15:50:47 2005 Return-Path: X-Original-To: cvs-src@freebsd.org Delivered-To: cvs-src@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7AD4B16A41F; Tue, 18 Oct 2005 15:50:47 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from mv.twc.weather.com (mv.twc.weather.com [65.212.71.225]) by mx1.FreeBSD.org (Postfix) with ESMTP id 3EA3A43D46; Tue, 18 Oct 2005 15:50:46 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from [10.50.41.234] (Not Verified[10.50.41.234]) by mv.twc.weather.com with NetIQ MailMarshal (v6, 0, 3, 8) id ; Tue, 18 Oct 2005 12:07:16 -0400 From: John Baldwin To: Andrew Gallatin Date: Tue, 18 Oct 2005 11:01:02 -0400 User-Agent: KMail/1.8.2 References: <200510172310.j9HNAVPL013057@repoman.freebsd.org> <20051018094402.A29138@grasshopper.cs.duke.edu> In-Reply-To: <20051018094402.A29138@grasshopper.cs.duke.edu> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200510181101.03956.jhb@freebsd.org> Cc: cvs-src@freebsd.org, src-committers@freebsd.org, David Xu , cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Oct 2005 15:50:47 -0000 On Tuesday 18 October 2005 09:44 am, Andrew Gallatin wrote: > David Xu [davidxu@FreeBSD.org] wrote: > > davidxu 2005-10-17 23:10:31 UTC > > > > FreeBSD src repository > > > > Modified files: > > sys/amd64/amd64 cpu_switch.S machdep.c > > Log: > > Micro optimization for context switch. Eliminate code for saving > > gs.base and fs.base. We always update pcb.pcb_gsbase and pcb.pcb_fsbase > > when user wants to set them, in context switch routine, we only need to > > write them into registers, we never have to read them out from registers > > when thread is switched away. Since rdmsr is a serialization instruction, > > micro benchmark shows it is worthy to do. > > Nice. This reduces lmbench context switch latency by about 0.4us (7.2 > -> 6.8us), and reduces TCP loopback latency by about 0.9us (36.1 -> > 35.2) on my dual core 3800+ > > It is a shame we can't find a way to use the TSC as a timecounter on > SMP systems. It seems that about 40% of the context switch time is > spent just waiting for the PIO read of the ACPI-fast or i8254 to > return. You can try it by just setting the kern.timecounter.smp_tsc=1 tunable on boot. -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve" = http://www.FreeBSD.org