Date: Mon, 8 Apr 2024 22:31:17 +0200 From: Warner Losh <imp@bsdimp.com> To: Paul Floyd <pjfloyd@wanadoo.fr> Cc: freebsd-arm@freebsd.org Subject: Re: arm64 mrs and system registers Message-ID: <CANCZdfpQBTWK-8DTR0TwE8LzPe81EQ7LzwZpw54iQeAs9d7Fvw@mail.gmail.com> In-Reply-To: <e7aa2897-e05a-4a91-a1a0-f6c0a03156ae@wanadoo.fr>
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[-- Attachment #1 --] On Mon, Apr 8, 2024 at 9:03 PM Paul Floyd <pjfloyd@wanadoo.fr> wrote: > Hi > > I've been looking at this bugzilla item > > https://bugs.kde.org/show_bug.cgi?id=392146 > > Is there any difference between Linux and FreeBSD when it comes to what > registers and fields are exposed by the kernel (see comment 17 in the > link above). > I don't think so. We've not seen issues with other drivers on aarch64 except when they were written on x86 and didn't have the synchronization needed for the weaker memory models in aarch64 systems. > I did have a poke around the kernel code but it's a bit hard to tell > exactly which of the access macros are being used, without exhaustively > grepping for them one by one. > Yea, I think that there's missing atomics on the state transitions and/or some missing locking that "magically" provides barriers that make it work on x86. Warner [-- Attachment #2 --] <div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Apr 8, 2024 at 9:03 PM Paul Floyd <<a href="mailto:pjfloyd@wanadoo.fr">pjfloyd@wanadoo.fr</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hi<br> <br> I've been looking at this bugzilla item<br> <br> <a href="https://bugs.kde.org/show_bug.cgi?id=392146" rel="noreferrer" target="_blank">https://bugs.kde.org/show_bug.cgi?id=392146</a><br>; <br> Is there any difference between Linux and FreeBSD when it comes to what <br> registers and fields are exposed by the kernel (see comment 17 in the <br> link above).<br></blockquote><div><br></div><div>I don't think so. We've not seen issues with other drivers on aarch64 except</div><div>when they were written on x86 and didn't have the synchronization needed</div><div>for the weaker memory models in aarch64 systems.</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"> I did have a poke around the kernel code but it's a bit hard to tell <br> exactly which of the access macros are being used, without exhaustively <br> grepping for them one by one.<br></blockquote><div><br></div><div>Yea, I think that there's missing atomics on the state transitions and/or</div><div>some missing locking that "magically" provides barriers that make it work</div><div>on x86.</div><div><br></div><div>Warner </div></div></div>help
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