Date: Thu, 9 Feb 2023 07:56:38 GMT From: Dmitry Chagin <dchagin@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 68c2bb67fec2 - stable/13 - amd64: Eliminate write only cpu_fxsr. Message-ID: <202302090756.3197uc4M092796@gitrepo.freebsd.org>
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The branch stable/13 has been updated by dchagin: URL: https://cgit.FreeBSD.org/src/commit/?id=68c2bb67fec2c4838c254fe562a17d8a5c7278f7 commit 68c2bb67fec2c4838c254fe562a17d8a5c7278f7 Author: Dmitry Chagin <dchagin@FreeBSD.org> AuthorDate: 2023-02-01 15:17:06 +0000 Commit: Dmitry Chagin <dchagin@FreeBSD.org> CommitDate: 2023-02-09 07:54:16 +0000 amd64: Eliminate write only cpu_fxsr. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D38289 MFC after: 1 week (cherry picked from commit 5c32146723ef88b07506c081653898cd2f293a52) --- sys/amd64/amd64/initcpu.c | 2 +- sys/i386/i386/npx.c | 1 + sys/i386/include/md_var.h | 1 + sys/x86/include/x86_var.h | 1 - sys/x86/x86/identcpu.c | 1 - 5 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index cddf8502437e..16780a9e069b 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -279,7 +279,7 @@ initializecpu(void) cr4 = rcr4(); if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) { cr4 |= CR4_FXSR | CR4_XMM; - cpu_fxsr = hw_instruction_sse = 1; + hw_instruction_sse = 1; } if (cpu_stdext_feature & CPUID_STDEXT_FSGSBASE) cr4 |= CR4_FSGSBASE; diff --git a/sys/i386/i386/npx.c b/sys/i386/i386/npx.c index d5a730ce5870..86291ae9b96b 100644 --- a/sys/i386/i386/npx.c +++ b/sys/i386/i386/npx.c @@ -196,6 +196,7 @@ SYSCTL_INT(_hw, OID_AUTO, lazy_fpu_switch, CTLFLAG_RWTUN | CTLFLAG_NOFETCH, &lazy_fpu_switch, 0, "Lazily load FPU context after context switch"); +u_int cpu_fxsr; /* SSE enabled */ int use_xsave; uint64_t xsave_mask; static uma_zone_t fpu_save_area_zone; diff --git a/sys/i386/include/md_var.h b/sys/i386/include/md_var.h index 88b036a9cc24..d4fa7668b5f3 100644 --- a/sys/i386/include/md_var.h +++ b/sys/i386/include/md_var.h @@ -36,6 +36,7 @@ #include <x86/x86_var.h> +extern u_int cpu_fxsr; extern u_int cyrix_did; #if defined(I586_CPU) && !defined(NO_F00F_HACK) extern int has_f00f_bug; diff --git a/sys/x86/include/x86_var.h b/sys/x86/include/x86_var.h index 756849cbe028..8829543f98a1 100644 --- a/sys/x86/include/x86_var.h +++ b/sys/x86/include/x86_var.h @@ -53,7 +53,6 @@ extern u_int cpu_stdext_feature; extern u_int cpu_stdext_feature2; extern u_int cpu_stdext_feature3; extern uint64_t cpu_ia32_arch_caps; -extern u_int cpu_fxsr; extern u_int cpu_high; extern u_int cpu_id; extern u_int cpu_max_ext_state_size; diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index 263e05dcf0ae..e608fdb5f20d 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -106,7 +106,6 @@ u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */ u_int cpu_procinfo2; /* Multicore info */ char cpu_vendor[20]; /* CPU Origin code */ u_int cpu_vendor_id; /* CPU vendor ID */ -u_int cpu_fxsr; /* SSE enabled */ u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ u_int cpu_clflush_line_size = 32; u_int cpu_stdext_feature; /* %ebx */
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